Switched capacitor DC-DC converter based distributed maximum power point tracking of partially shaded photovoltaic arrays

Abstract

A method and system for implementing DMPP tracking of partially shaded/uniformly illuminated photovoltaic arrays using switched capacitor DC-DC converter is disclosed. Here, a dedicated SC converter is connected across each PV cell or PV module made of series connected PV cells wherein series connected modules make a PV string and parallel connected PV strings make up a PV array. This SC converter injects an equalization current across the PV module or PV cell so that the total current in the parallel combination of the PV module or PV cell and the corresponding SC converter is the same as the PV string current. In another implementation of DMPP tracking using SC converters, a dedicated SC converter is connected across each isolated PV module to perform MPP tracking of the respective PV module. Then all MPP tracking SC converter outputs are diode ORed to the common load.

Claims

1. A method for implementing Distributed Maximum Power Point (DMPP) tracking schemes for a Photo Voltaic (PV) array, wherein the method uses Switched Capacitor (SC) DC (Direct Current)-DC (Direct Current) converters, wherein the method comprises: connecting a dedicated SC DC-DC converter across one of: each PV module of a PV string, wherein the PV array comprises a plurality of PV strings connected in parallel, the PV strings each comprise series connected PV modules and the PV modules each comprise a plurality of PV cells connected in series, wherein each dedicated SC DC-DC converter injects an equalization current across each PV module, wherein total current flowing through a parallel combination of each PV module and the corresponding dedicated SC DC-DC converter is equal to maximum current that can be produced by the PV string, and each PV cell of a PV string, wherein the PV array comprises a plurality of PV strings connected in parallel and the PV strings each comprise a plurality of PV modules connected in series, wherein each dedicated SC DC-DC converter injects an equalization current across each PV cell such that the total current flowing through a parallel combination of each PV cell and the corresponding SC DC-DC converter is equal to the maximum current that can be produced by the PV string.

2. The method, as claimed in claim 1, wherein each dedicated SC DC-DC converter maintains the voltage across each corresponding PV module to be Maximum Power Point (MPP) voltage of the PV module.

3. The method as claimed in claim 1, wherein each dedicated SC DC-DC converter maintains the voltage across each corresponding PV cell to be Maximum Power Point (MPP) voltage of that cell.

4. A Photo Voltaic (PV) array using a Distributed Maximum Power Point (DMPP) tracking scheme, wherein the PV array uses Switched Capacitor (SC) DC (Direct Current)-DC (Direct Current) converters, wherein the PV array comprises: a dedicated SC DC-DC converter connected across one of: each PV module of a PV string, wherein the PV array comprises a plurality of PV strings connected in parallel, the PV strings each comprise of a plurality of PV modules connected in series and the PV modules each comprise of a plurality of PV cells connected in series, wherein each dedicated SC DC-DC converter is configured for injecting an equalization current across each PV module, wherein total current flowing through a parallel combination of each PV module and the corresponding dedicated SC DC-DC converter is equal to the maximum current that can be produced by the PV string, and each PV cell of a PV string, wherein the PV array comprise a plurality of PV strings connected in parallel and the PV strings each comprise a plurality of series connected PV modules, wherein each dedicated SC DC-DC converter injects an equalization current across each PV cell such that the total current flowing through a parallel combination of each PV cell and the corresponding SC DC-DC converter is equal to the maximum current that can be produced by the PV string.

5. The PV array, as claimed in claim 4, wherein each dedicated SC DC-DC converter is configured for maintaining voltage across each corresponding PV module to be Maximum Power Point (MPP) voltage of the PV module.

Description

BRIEF DESCRIPTION OF FIGURES

(1) This embodiment is illustrated in the accompanying drawings, throughout which like reference letters indicate corresponding parts in the various figures. The embodiments herein will be better understood from the following description with reference to the drawings, in which:

(2) FIG. 1 illustrates a two module PV array with DC-DC converters for current equalization, as disclosed in the embodiments herein;

(3) FIG. 2 illustrates a current equalization scheme of a PV array with ground isolated SC DC-DC converters as disclosed in the embodiments herein;

(4) FIGS. 3a and 3b illustrates a ground isolated SC DC-DC converter, MOSFET drive and voltage across charge transfer capacitor (CT) as disclosed in embodiments herein;

(5) FIG. 4 illustrates PV module MPP tracker as disclosed in embodiments herein;

(6) FIGS. 5a and 5b illustrates the experimental waveforms: variation of equalization current IE with change in operating duty ratio as disclosed in embodiments herein;

(7) FIG. 6 illustrates the experimental waveforms of the PV module MPP tracker of FIG. 4 as disclosed in the embodiments herein;

(8) FIG. 7 illustrates a PV cell integrated current equalization SC converter as disclosed in embodiments herein;

(9) FIG. 8 illustrates another SC converter based DMPP tracking scheme as disclosed in embodiments herein;

(10) FIG. 9 illustrates load interfaced to PV module through an MPP tracker as disclosed in embodiments herein;

(11) FIG. 10 illustrates a reconfigurable buck type SC converter based MPP tracker used for tracking the MPP of a PV source as disclosed in embodiments herein;

(12) FIGS. 11a and 11b illustrates experimental waveforms as disclosed in embodiments herein;

(13) FIGS. 12a and 12b illustrates a comparison of theoretical and experimental results as disclosed in embodiments herein;

(14) FIG. 13 illustrates the implementation of DMPP tracking with SC converter based current equalization for each PV cell as disclosed in embodiments herein; and

(15) FIG. 14 illustrates the implementation of DMPP tracking with module dedicated SC converter based MPP tracker as disclosed in embodiments herein.

DETAILED DESCRIPTION OF INVENTION

(16) The embodiments herein and the various features and advantageous details thereof are explained more fully with reference to the non-limiting embodiments that are illustrated in the accompanying drawings and detailed in the following description. Descriptions of well-known components and processing techniques are omitted so as to not unnecessarily obscure the embodiments herein. The examples used herein are intended merely to facilitate an understanding of ways in which the embodiments herein may be practiced and to further enable those of skill in the art to practice the embodiments herein. Accordingly, the examples should not be construed as limiting the scope of the embodiments herein.

(17) The embodiments herein achieve a maximum power point tracking of partially shaded photovoltaic arrays by providing a method and system thereof.

(18) Referring now to the drawings, and more particularly to FIGS. 1 through 14, where similar reference characters denote corresponding features consistently throughout the figures, there are shown preferred embodiments.

(19) FIG. 1 illustrates a two module PV array with DC-DC converters for current equalization, as disclosed in the embodiments herein. Consider a PV array made up of two PV modules connected in series as shown in the FIG. It is assumed that module 1 is fully illuminated and module 2 is partially shaded. There are no bypass diodes across the modules as is the case with the PV module dedicated MPP tracker scheme. A ground isolated DC-DC converter 102 is connected across each PV module. The ground isolated DC-DC converter 102 draws power from the output of an Array MPP Tracker 101 and injects an equalization current (I.sub.1E or I.sub.2E) across the respective PV module. The ground isolated DC-DC converter forces the PV module to operate at its MPP by maintaining the voltage across it at its MPP voltage (V.sub.1MPP or V.sub.2MPP).

(20) Consider the MPP current generated by PV module 1 to be I.sub.1MPP and that generated by PV module 2 to be I.sub.2MPP ( ). Due to partial shading conditions, the current in the PV module 103.b will be lesser than the current in the PV module 103.a, i.e., I.sub.1MPP>I.sub.2MPP. At node A, to satisfy KCL (Kirchhoff's current law), the below equation is represented:
I.sub.2E=I.sub.1MPP−I.sub.2MPP+I.sub.1E  (1)

(21) The DC-DC converter operates in such a way that it maintains a voltage V.sub.2MPP across module 2 and injects an equalization current I.sub.2E given by (1). Thus converter 2 outputs an equalization power:
P.sub.2E=V.sub.2MPP×I.sub.2E  (2)

(22) The input power of the module 102.b is drawn from the output of the Array MPP tracker 101. The PV module 103.a is fully illuminated and hence the current flowing through the PV module 103.a is its MPP current. Therefore, the current in the PV array is approximately equal to the MPP current of PV module 103.a. The equalization current injected by converter 102 (a) across the PV module 103(a) is I.sub.1E≈0.

(23) Thus in the two module PV array of FIG. 1, the array current is equal to the current of the fully illuminated module 103.a. The current equalization process injects an equalization current across the partially illuminated module 103.b such that the sum of the injected equalization current and the current of the corresponding PV module are equal to the array current.

(24) Hence the equalization power (P.sub.E1) delivered by converter 1 is almost zero. Thus the total equalization power is P.sub.E≈P.sub.2E. Let P.sub.AMPP denote the power available at the output of the array MPP tracker whose efficiency is assumed to be unity for simplicity. If the equalization converter's efficiency is η.sub.c, the total power P.sub.T available after current equalization scheme is:
P.sub.T=P.sub.AMPP−P.sub.2E/η.sub.C  (3)
where P.sub.AMPP=V.sub.AMPP×I.sub.1MPP  (4)
V.sub.AMPP=V.sub.1MPP+V.sub.2MPP  (5)

(25) Therefore, irrespective of the amount of partial shading, a module delivers the maximum power it can generate. The current vs. voltage (I.sub.A vs. V.sub.A) and Power vs. Voltage (P.sub.A vs. V.sub.A) characteristics of the PV array is similar to the characteristics observed during uniform illumination (with a single power peak) irrespective of whether the individual PV modules are partially shaded or uniformly illuminated. Compared to existing tracking schemes for partially shaded PV arrays, the process of the array MPP tracker running a MPP tracking algorithm to track the PV array's MPP is simpler.

(26) FIG. 2 illustrates a current equalization scheme of a PV array with ground isolated SC DC-DC converters as disclosed in the embodiments herein. The figure depicts the overall scheme for the SC converter based current equalization of ‘n’ PV modules that are connected in series to form a PV array. In an embodiment, current equalization using SC DC-DC converters connected across each PV module are used for extracting maximum power from partially shaded PV modules. Also, the method is applicable for uniformly illuminated PV modules as well. The input of the SC converter used for current equalization is connected to the output terminals AB of a step down converter 201 which in turn is powered from the output of the Array MPP tracker 101.

(27) Further, the output of each SC converter is connected across a PV module. All the SC converters ranging from 1 to n−1 are of ground isolated topology whereas the n.sup.th SC converter is connected to the circuit ground. Each SC converter has a dedicated control circuit that precisely controls the voltage across its output terminals as well as the equalization current that is to be injected across the associated PV module. Also, dedicated MPP trackers 203 are associated with the PV modules 103 to ensure that each PV module 103 in the array operates at its MPP. Dedicated Pulse Width Modulation (PWM) based controls 202 aid each of the SC DC-DC converters for regulating the module voltage to V.sub.iMPP and injecting the corresponding equalization current of I.sub.iF.

(28) FIGS. 3a and 3b illustrate a ground isolated SC DC-DC converter, Metal-Oxide semiconductor field effect transistor (MOSFET) drive and voltage across the charge transfer capacitor (CT) as disclosed in embodiments herein. The FIG. 3a shows a ground isolated SC DC-DC converter whose output is connected across the i.sup.th PV module in a PV array consisting of n series connected PV modules. All MOSFETs except Q1 are n-channel. As shown in FIG. 3 (b), D1 is the operating duty ratio of Q1 and Q2. D2 is the operating duty ratio of Q3 and Q4. The variable duty ratio of MOSFETs Q1 and Q2 is D1Ts. Q3 and Q4 are driven with a fixed ON time=D2Ts. Q1 and Q2 are turned ON in phase for duration D1Ts. Similarly Q3 and Q4 are turned ON in phase for D2Ts but in anti-phase with Q1 and Q2, i.e., the phase difference between Q1, Q2 and Q3, Q4 is equal to 180 degrees. Q3 and Q4 are driven by pulse transformers to maintain ground isolation. Thus the charge transfer capacitor C.sub.T is electronically switched between the source V.sub.S and output capacitor C.sub.O connected across the PV module. The switching sequence shown in FIG. 3(b), shows that the source ground g.sub.S is always isolated from the output ground g.sub.O. The SC converter output is regulated to V.sub.iMPP, which is the MPP voltage of the i.sup.th PV module. Thus the voltage across CO is regulated to V.sub.iMPP. The voltage across CT is also shown in FIG. 3(b). V(D1Ts) is the value of the voltage across C.sub.T after a charging time D1Ts. I.sub.iS is the SC converter's input current in FIG. 3(a).

(29) If ΔV.sub.iMPP is the output ripple, C.sub.O and C.sub.T are given by:

(30) $\begin{array}{cc}{C}_O=\frac{I_{\mathrm{iE}}\times t_1}{\Delta V_{\mathrm{iMPP}}}\mathrm{and}& \left(6\right)\\ C_T=\frac{\Delta Q}{V_S-V_{\mathrm{iMPP}}}\mathrm{where}& \left(7\right)\\ \Delta Q=\left(I_{\mathrm{iE}}\times t_2\right)+C_O\times \Delta V_{\mathrm{iMPP}}& \left(8\right)\end{array}$

(31) If t.sub.1 is the maximum ON time of Q.sub.1 and Q.sub.2 and if t.sub.2 is the maximum ON time of Q.sub.3 and Q.sub.4, then t.sub.1+t.sub.2=T.sub.S. C.sub.T may be expressed in terms of the output power P.sub.O and switching frequency f.sub.S=1/T.sub.S as:

(32) $\begin{array}{cc}{C}_T=\frac{P_O}{\left(V_S-V_{\mathrm{iMPP}}\right).Math.V_{\mathrm{iMPP}}.Math.f_S}& \left(9\right)\end{array}$

(33) The voltage variations across CT is depicted in FIG. 3b where the MOSFETs Q1,Q2 are turned on in the duration D1TS and Q3,Q4 are turned on in the duration of D2TS but in anti-phase with Q1,Q2. The main loss in an SC converter is the capacitor charge up loss. In the buck topology of FIG. 3, the charge up loss is given by ½ C.sub.T (ΔV).sup.2 where ΔV is the step change of the voltage across C.sub.T. Further, the charge up loss in the buck type SC converter shown in FIG. 3a is minimized when V.sub.S−V.sub.iMPP is minimized.

(34) The SC converter maintains charge efficiency which implies that the charge put into C.sub.T during the charge up phase must be equal to the charge removed from it during the discharge phase. Since only one capacitor C.sub.T is involved in the charge-discharge process, I.sub.iE=I.sub.iS for the topology shown in FIG. 3a. Thus the maximum efficiency η of the SC converter is:

(35) $\begin{array}{cc}\eta =\frac{V_{\mathrm{iMPP}}.Math.I_{\mathrm{iE}}}{V_S.Math.I_{\mathrm{iS}}}=\frac{V_{\mathrm{iMPP}}}{V_S}& \left(10\right)\end{array}$

(36) From equation (10) it is evident that theoretically η≈100% efficiency when V.sub.S≈V.sub.iMPP. Therefore, it is of utmost need to keep a minimum voltage differential between V.sub.S and V.sub.iMPP. Further, the step down converter 201 ensures that the input output voltage differential of the SC converter is kept as low as possible by maintaining the input to the SC converter V.sub.S=V.sub.iMPP+∂V where ∂V is a small voltage that is of minute value.

(37) Let the step down converter of 201 have an efficiency η.sub.SD and let the current equalization SC converter have an efficiency η.sub.SC. Now equation (3) has to be modified as shown below to account for the converter efficiencies.
P.sub.T=P.sub.AMPP=P.sub.AMPP−P.sub.2E/(η.sub.SDη.sub.SC)  (11)

(38) Hence it is imperative that both η.sub.SD and η.sub.SC be as high as possible.

(39) FIG. 4 illustrates PV module MPP tracker as disclosed in embodiments herein. Each PV module has its own MPP tracker that ensures that the module always operates at its MPP. The MPP voltage of a module can vary by about 15% with change in insolation level due to partial shading. V.sub.GS of MOSFET Q is a ramp that drives it from OFF to ON state through the active region. This takes the PV module from near short circuit to open circuit through the MPP. An Opto Isolator 401 provides the ground isolation between the PV module ground and control circuit ground. The module voltage V.sub.PV and current I.sub.PV (measured as the drop across R.sub.S=1Ω) are multiplied by the analog multiplier 402 to give the instantaneous module power P.sub.PV that increases monotonically to reach the peak and then decreases. This direction change is detected by comparator C and then used to latch the i.sup.th module's V.sub.iMPP and I.sub.iMPP with a sample and hold (S & H) 403 chip.

(40) The power vs voltage (P.sub.A vs. V.sub.A) characteristics of the PV array has a single power peak. Since the PV modules are series connected, the module voltages add up. The PV array has an MPP at V.sub.AMPP=ΣV.sub.iMPP.

(41) The controller of the array MPP tracker is given an equivalent reference to ensure that the PV array is operated at this point which is the sum of the MPP voltages of individual modules, thus excluding the need for any kind of MPP tracking algorithm for the array MPP tracker. The process of determination of the MPP of a module may be performed in set time intervals and may be repeated in set time intervals. For example, the MPP determination may take 5 milliseconds and the process may be set to repeat during every four to five minutes. During the MPP determination, the PV array is disconnected from the load by opening a switch S through which it is connected to the Array MPP Tracker 101.

(42) The SC converter of the i.sup.th PV module has to regulate the module voltage to V.sub.iMPP while injecting an equalization current I.sub.iE across the module.

(43) In a PV array sometimes the i.sup.th PV module may be very poorly illuminated due to various factors such as lack of sunlight, exposure to dust and so on. Low illuminated modules make insignificant contribution to the load power. Now, I.sub.iE≈I.sub.AMPP, where I.sub.AMPP is the PV array's current at the MPP. Sometimes the i.sup.th PV module may be brightly illuminated. (I.sub.iE≈0). Under both these circumstances, the PV module voltage has to be maintained at V.sub.iMPP. Thus the current equalization SC converter must be able to regulate its output at V.sub.iMPP for a large load current variation with PWM control. This is the process of control of the SC converter.

(44) FIG. 5a and FIG. 5b illustrate the experimental waveforms with variation of equalization current IE with change in operating duty ratio as disclosed in the embodiments herein. FIGS. 5a and 5b show the variation of the equalization current IE with change in the ON time (=D1Ts) of the MOSFETs Q1 and Q2, Q3 and Q4 are driven with a fixed ON time equal (=D2Ts). It is shown that when D1Ts is increased, IE injected by the SC converter across the PV module increases and vice versa. For experimental analysis, two SC converters and two PV modules, each made of 20 numbers of series connected 4 cm×6 cm Si (silicon) solar cells were wired. A 1 kW halogen lamp was used to illuminate the modules. Partial shading was introduced on one of the modules. The FIGS. 5a and 5b respectively show the variation in the equalization current I.sub.E with change in duty ratio D.sub.1T.sub.S. Here D.sub.2T.sub.S is fixed at 0.5 T.sub.S.

(45) Comparison of power generated with current equalization scheme and module bypass diode.

(46) TABLE-US-00001 P.sub.T(W) V.sub.Ampp/2 η.sub.SC = 0.95 (V) I.sub.1mpp(A) P.sub.1mpp(W) I.sub.2mpp(A) P.sub.2mpp(W) I.sub.E1(A) I.sub.E2(A) η.sub.SD ≈ 1 P.sub.D(W) 8 0.2 1.6 0.15 1.2 0 0.05 2.77 1.5 8 0.2 1.6 0.17 1.36 0 0.03 2.95 1.5 8 0.1 0.8 0.2 1.6 0.1 0 2.36 1.5 8 0.18 1.44 0.2 1.6 0.02 0 3.0 1.5

(47) The above table depicts the comparison of the power generated from a PV array made with two PV modules with an SC converter based current equalization scheme. Further, the power available (P.sub.T) after current equalization and the power available with module by pass diodes (P.sub.D) for various equalization currents is tabulated in Table 1. It is evident that P.sub.T is always larger than P.sub.D.

(48) FIG. 6 illustrates the experimental waveforms of the PV module MPP tracker of FIG. 4 as disclosed in the embodiments herein. VGS is the ramp shaped gate drive to MOSFET Q to make the PV module traverse its current-voltage characteristics. I.sub.impp and V.sub.impp are the MPP values of the PV module current and voltage that are indicated on the module current and voltage waveforms respectively. The MPP power P.sub.impp is shown on the power curve, wherein P.sub.impp is obtained by multiplying the PV module's instantaneous voltage and current with the analog multiplier.

(49) FIG. 7 illustrates a PV cell integrated current equalization SC converter as disclosed in embodiments herein. The proposed current equalization scheme was experimentally verified for a PV module made with 20 numbers of series connected Silicon solar cells. However, this scheme may also be extended to the cell level. Miniaturized current equalization SC converters are connected across each PV cell. These SC converters may be realized on the same monolithic PV cell wafer itself. Further, the input power for current equalization is fed from an external source V.sub.S. The control circuits and MOSFET switches are realized on the same wafer as the PV cell. The only external components would be the charge transfer and output capacitor.

(50) FIG. 8 illustrates another SC converter based DMPP tracking scheme as disclosed in embodiments herein. There are n PV modules 103 where the negative terminals of all PV modules 103 are connected to a common ground. An SC converter 802 is connected across each PV module 103. Some of the PV modules 103 may be more illuminated than the other modules. The outputs of the SC converters 802 are diode ORed and connected to the input of a boost converter/inverter that forms the grid interface 801.

(51) In order to extract maximum power from the PV module; say 103.a, it is necessary to operate the module at the MPP. At MPP, the PV module's 103.a output resistance is R.sub.MPP. In case the electrical load R.sub.L is directly connected to the PV module, the operating point will deviate from the MPP since R.sub.MPP≠R.sub.L.

(52) FIG. 9 illustrates load interfaced to PV module through an MPP tracker as disclosed in embodiments herein. An intermediate matching DC-DC converter called the MPP tracker 203 is shown in the figure is used to interface the PV module 103.a to the load such that:
R.sub.MPP=1/m=R.sub.IN  (12)
where R.sub.MPP is the module's output resistance at MPP, R.sub.IN is the input resistance of the loaded intermediate DC-DC converter and m is the slope of the load line on the V-I curve at MPP.

(53) By equation (12), it can be ensured that the module's MPP is tracked. Existing techniques to perform MPP tracking of a PV source are implemented with DC-DC converters. In the DMPP tracking scheme proposed here, SC converters are used for tracking the MPP of individual PV modules.

(54) Further, the output voltage V.sub.O of all the MPP trackers is set to the same value where it is assumed that the illumination on every PV module is such that there is only one peak power point for that PV module. However, the peak power of the different PV modules may be different depending on the illumination. Any of the popular MPP tracking algorithms may be implemented for MPP tracking.

(55) FIG. 10 illustrates a reconfigurable buck type SC converter based MPP tracker used for tracking the MPP of a PV source as disclosed in embodiments herein. The figure depicts a reconfigurable SC converter DMPP tracker proposed to reduce charge up losses in SC converters. Q.sub.1 and Q.sub.2 are p-channel MOSFETs whereas Q.sub.3 is an n-channel MOSFET. If the MOSFET is a p-channel or p MOS FET, then the source and drain are ‘p+’ regions and the body is an ‘n’ region. If the MOSFET is an n-channel or n MOS FET, then the source and drain are ‘n+’ regions and the body is a ‘p’ region. Q1 is operated with a duty ratio D.sub.1 such that 0≦D.sub.1≦0.45 whereas Q.sub.2 operates at a fixed duty ratio D.sub.2=0.45. This ensures a dead time t.sub.D≧0.05TS. Q.sub.3 is an n-channel MOSFET that is permanently ON or OFF depending upon V.sub.IN and V.sub.O.

(56) SD.sub.1 to SD.sub.4 are Schottky diodes. Schottky diodes are semiconductor diodes with a low forward voltage drop and a very fast switching action. C.sub.1 and C.sub.2 are very low Equivalent Series Resistance (ESR) metalized polyester charge transfer capacitors (C.sub.1=C.sub.2). ESR is the sum of all internal resistances of a capacitor measured in ohms.

(57) Further, C.sub.IN and C.sub.O are the input and output capacitor banks respectively that are much larger than C.sub.1 and C.sub.2. The presence of C.sub.IN ensures a constant input voltage V.sub.IN to the SC converter. A resistive load is connected to the output of the SC converter.

(58) Unlike, SC converters operating from voltage sources like batteries where the variation in V.sub.IN is limited, PV array fed SC converters have to operate over a wide input voltage range arising out of varying I-V characteristics of the PV source due to varying intensities of solar radiation. In the above mentioned DMPP tracking scheme, since the entire power from the PV array has to be processed by the SC converter performing DMPP tracking, its efficiency has to be as high as possible. In a preferred embodiment, the system may be operated in different modes and the mode in which the system has to operate may be based on intensity level of the solar radiation. The different operation modes are:

(59) Operating Mode 1:—

(60) The system may be made operate in Operating mode 1 when the intensity of solar radiation is high. When solar radiation is of high intensity, the MPP voltage (V.sub.MPP) of the PV module may be such that V.sub.O<½V.sub.IN. Q.sub.3 is set OFF to initiate mode 1 operation. Initially Q.sub.1 turns ON, serially charging C.sub.1 and C.sub.2 through SD.sub.3. Thus the effective charge transfer capacitance is C.sub.1/2=C.sub.2/2. Q.sub.1 then turns OFF and Q.sub.2 turns ON after a predefined dead time. Now C.sub.1 and C.sub.2 are connected in parallel through SD.sub.1 and SD.sub.2 and they discharge into C.sub.O and the battery through the blocking diode SD.sub.4. This mode of operation ensures that ΔV is small resulting in higher efficiency even though the input-output voltage differential is large.

(61) Operating Mode 2:—

(62) The system may be made operate in operation mode 2 when intensity of the solar ray is low. When solar radiation intensity is low, the VMPP of the PV module may be such that V.sub.O≧½V.sub.IN. In such situations, Q.sub.3 is permanently turned ON to initiate mode 2 operation. Now the effective charge transfer capacitance is C.sub.1 and it is charged and discharged when Q.sub.1 and Q.sub.2 are switching. C.sub.2 is now electrically isolated and plays no part in the charge transfer from source to load. Hence V.sub.O may be ≧½V.sub.IN during operation in mode 2. Thus the limitation of a restricted input voltage range observed with mode 1 operation alone is eliminated. Also, the efficiency is acceptable since the input-output voltage differential is not high except in the region of V.sub.O≈½V.sub.IN. The input resistance R.sub.IN of the SC converter MPP tracker for mode 2 operation is given by

(63) $\begin{array}{cc}{R}_{\mathrm{IN}}=\frac{V_{\mathrm{IN}}}{I_{\mathrm{IN}}}=\frac{1}{C_T.Math.f_S.Math.\left(1-k\right).Math.\left(1-e^{\frac{-D_1}{f_S{\tau }_1}}\right)}& \left(13\right)\end{array}$

(64) For mode 1, R.sub.IN is given by

(65) $\begin{array}{cc}{R}_{\mathrm{IN}}=\frac{V_{\mathrm{IN}}}{I_{\mathrm{IN}}}=\frac{1}{C_T.Math.f_S.Math.\left(1-k\right).Math.\left(1-e^{\frac{-D_1}{f_S{\tau }_1}}\right)}\mathrm{Where}& \left(14\right)\\ k=V_O/V_{\mathrm{IN}}& \left(15\right)\end{array}$

(66) Here, τ.sub.1=R.sub.1.Math.C.sub.T (in mode 2) and τ.sub.1=R.sub.1.Math.½C.sub.T (in mode 2), where R.sub.1 is the input circuit parasitic resistance. (parasitic extraction is calculation of the parasitic effects in both the designed devices and the required wiring interconnects of an electronic circuit: detailed device parameters, parasitic capacitances, parasitic resistances and parasitic inductances, commonly called parasitic devices, parasitic components, or simply parasitic) R.sub.IN of the SC converter MPP tracker is adjusted by PWM to match R.sub.MPP of the module. More operating modes may be introduced to improve the efficiency by reducing charge up losses over a wide operating range.

(67) FIGS. 11a and 11b illustrates experimental waveforms as disclosed in embodiments herein. FIG. 11(a) depicts the drive signals to the MOSFETs Q.sub.1 and Q.sub.2 (V.sub.GS Q.sub.1 and V.sub.GS Q.sub.2) and the charge transfer capacitor voltage waveform (V.sub.CT) in mode 2 operation with V.sub.O=12V. FIG. 11(b) depicts the current waveforms through both the charge transfer capacitors (I.sub.CT1 and I.sub.CT2) and voltage waveform (V.sub.CT) across the charge transfer capacitors in mode 1.

(68) A 10 W SC dc-dc converter is designed to track the MPP of a PV module whose V.sub.MPP varies in the range 9V≦V.sub.MPP≦16V during periods of partial shading and uniform illumination. Substituting P.sub.O=10 W, ΔV=3V (which ensures a minimum differential of 3V between V.sub.O and V.sub.IN), f.sub.S=30 kHz and V.sub.OMIN=4V in (9) gives C.sub.T=C.sub.1=C.sub.2≈33 μF

(69) C.sub.1 and C.sub.2 are metalized polyester capacitors (Euro Farad PM90R1S) with high ripple current ratings and a very low ESR of ≈4 mΩ at 30 kHz. Referring to FIG. 10, Q.sub.1 (IRF 9630, R.sub.DSON=0.8Ω, I.sub.DSMAX=6.5 A) and Q.sub.2 (IRHMS 597160, R.sub.DSON=50 mΩ, I.sub.DSMAX=45 A) are p-channel MOSFETs. To reduce the effective R.sub.DSON of Q.sub.2, four such MOSFETs are paralleled so that the effective R.sub.DSON≈12 mΩ. Subject to availability, a single very low R.sub.DSON p-MOSFET (like Vishay's SUM110P06-08L, R.sub.DSON=8 mΩ) may be used.

(70) Q.sub.3 (IRHSNA 57064, R.sub.DSON=6 mΩ, I.sub.DSMAX=75 A) is an n-channel MOSFET of very low R.sub.DSON. Diodes SD.sub.1 to SD.sub.4 are Schott key diodes (1N 5822). C.sub.IN=200 μF and C.sub.O=47 μF are Tantalum electrolytic capacitors. C.sub.IN ensures a constant voltage V.sub.IN to the SC converter. A tantalum capacitor is a type of electrolytic capacitor, a component of electronic circuits. It typically consists of a pellet of tantalum metal as anode, covered by an insulating oxide layer that forms the dielectric, surrounded by conductive material as a cathode. Tantalum capacitors are the main use of the element tantalum. The tantalum capacitor distinguishes itself from other capacitors in having high capacitance per volume and weight. Tantalum capacitors have lower equivalent series resistance (ESR), lower leakage, and higher operating temperature than other electrolytic capacitors.

(71) FIGS. 12a and 12b illustrates a comparison of theoretical and experimental results as disclosed in embodiments herein. The Figures depict a comparison of the theoretical and practical values of the input resistance R.sub.IN for different duty ratios.

(72) FIG. 12a depicts the comparison of theoretical and experimental results (PWM, mode 2): CT=33 μF, R1=1.05Ω and 1.55Ω, k=0.77, fS=30 kHz, 0.1≦D1≦0.45. FIG. 12b depicts the comparison of theoretical and experimental results (PWM, mode 1): CT=16.5 μF, R1=1.05Ω and 1.55Ω and k=0.43, fS=15 kHz, 0.1≦D1≦0.45.

(73) Two similar SC converters with the above mentioned specifications were wired and interfaced to two tunable PV module simulators. MPP tracking was done with the Perturb and Observe algorithm. In the Perturb and observe method, the controller varies the PV array voltage by a small amount and measures power. If the power increases, further adjustments in that direction are tried until power oscillates about the MPP.

(74) The outputs of the SC converters are diode ORed and connected to a common resistive load. The P-V characteristics of the simulator were varied and the MPP tracking was verified. Table 2 shows some of the experimental results of SC Converter Based DMPP Tracker's efficiency for different operating conditions.

(75) TABLE-US-00002 V.sub.in I.sub.in P.sub.in V.sub.o I.sub.o P.sub.o Mode (V) (A) (W) (V) (A) (W) η 1 16.5 0.33 5.44 6.5 0.66 4.29 79.0 16 0.33 5.28 6.5 0.66 4.29 81.37 13 0.45 5.85 5.0 0.9 4.52 77.3 11 0.45 4.95 4.5 0.9 4.06 82.2 2 15 0.65 9.7 12 0.64 7.78 80.2 9.2 0.63 5.8 7 0.64 4.44 76.7 14 0.75 10.5 10 0.76 7.6 72.3

(76) Conventional DC-DC converter based DMPP schemes were reported earlier. In the current invention, SC DC-DC converter based DMPP schemes are introduced. The bulkiest components in conventional DC-DC converters are the inductor and transformer coils. Since SC converters do not contain power handling coils, they are very compact. SC converters have very high conversion efficiency under certain operating conditions. The absence of power handling magnetics makes large scale manufacturing easier and more economical. They can be integrated into the PV module or PV cell during the manufacturing process.

(77) FIG. 13 illustrates the implementation of DMPP tracking with SC converter based current equalization for each PV cell as disclosed in embodiments herein. The figure shows the case where DMPP tracking with current equalization is realized with SC converters integrated into the monolithic wafer containing the PV cell itself.

(78) FIG. 14 illustrates the implementation of DMPP tracking with module dedicated SC converter based MPP tracker as disclosed in embodiments herein. The figure shows that hybrid micro circuit technology may be used to realize module integrated DMPP tracking SC converters for n isolated PV modules. Here a hybridized SC converter is used as a module dedicated MPP tracker.

(79) The present embodiment does not require any form of tuning, they are ideal for large scale production. PV modules with SC converter based DMPP tracking schemes find use in applications where partial array shading is encountered. They are also ideal for use with PV modules mounted on contoured surfaces or applications with large thermal gradients. DMPP tracking schemes allow the user to interconnect together PV modules with varying current-voltage characteristics sparing the user the trouble of matching the module current-voltage characteristics. Also, DMPP tracking allows a modular approach to PV based power generation and improves system reliability. The DMPP tracking schemes ensure that the P-V characteristics of the PV system have only a single power peak as compared to multiple power peaks characteristic of partially shaded PV arrays. This simplifies the MPP tracking algorithm that needs to be implemented.

(80) The embodiments disclosed herein can be implemented through at least one software program running on at least one hardware device and performing network management functions to control the network elements. The network elements shown in FIG. 1 include blocks which can be at least one of a hardware device, or a combination of hardware device and software module.

(81) The embodiment disclosed herein describes a method and system for DMPP based on the current equalization scheme implemented with ground isolated SC DC-DC converters. Therefore, it is understood that the scope of the protection is extended to such a program and in addition to a computer readable means having a message therein, such computer readable storage means contain program code means for implementation of one or more steps of the method, when the program runs on a server or mobile device or any suitable programmable device. The method is implemented in a preferred embodiment through or together with a software program written in e.g. Very high speed integrated circuit Hardware Description Language (VHDL) another programming language, or implemented by one or more VHDL or several software modules being executed on at least one hardware device. The hardware device can be any kind of portable device that can be programmed. The device may also include means which could be e.g. hardware means like e.g. an ASIC, or a combination of hardware and software means, e.g. an ASIC and an FPGA, or at least one microprocessor and at least one memory with software modules located therein. The method embodiments described herein could be implemented partly in hardware and partly in software. Alternatively, the embodiment may be implemented on different hardware devices, e.g. using a plurality of CPUs.

(82) The foregoing description of the specific embodiments will so fully reveal the general nature of the embodiments herein that others can, by applying current knowledge, readily modify and/or adapt for various applications such specific embodiments without departing from the generic concept, and, therefore, such adaptations and modifications should and are intended to be comprehended within the meaning and range of equivalents of the disclosed embodiments. It is to be understood that the phraseology or terminology employed herein is for the purpose of description and not of limitation. Therefore, while the embodiments herein have been described in terms of preferred embodiments, those skilled in the art will recognize that the embodiments herein can be practiced with modification within the spirit and scope of the embodiments as described herein.