PE-CVD apparatus and method

Abstract

A plasma-enhanced chemical vapor deposition (PE-CVD) apparatus includes a chamber including a circumferential pumping channel, a substrate support disposed within the chamber, one or more gas inlets for introducing gas into the chamber, a plasma production device for producing a plasma in the chamber, and an upper and a lower element positioned in the chamber. The upper element is spaced apart from the substrate support to confine the plasma and to define a first circumferential pumping gap, and the upper element acts as a radially inward wall of the circumferential pumping channel. The upper and lower elements are radially spaced apart to define a second circumferential pumping gap which acts as an entrance to the circumferential pumping channel, in which the second circumferential pumping gap is wider than the first circumferential pumping gap.

Claims

1. A method of performing plasma-enhanced chemical vapor deposition (PE-CVD) comprising the steps of: providing an apparatus including a process chamber, a substrate support disposed within the process chamber, one or more gas inlets communicating with the process chamber, and an upper and a lower element disposed in the process chamber, wherein a radially inner surface of the upper element and a side of the substrate support face and are spaced from one another by a first distance in a radial direction of the process chamber to define a first circumferential pumping gap therebetween, the upper element has a radially outwardly facing surface delimiting a radially inner side of a main circumferential pumping channel of the process chamber, the lower element faces and is spaced from the side of the substrate support in the radial direction of the chamber to delimit therewith an auxiliary circumferential pumping channel of the process chamber disposed below the main circumferential pumping channel as radially overlapped therewith, the first circumferential pumping gap constituting an entrance to the auxiliary circumferential pumping channel, a bottommost part of the upper element and an uppermost part of the lower elements are offset from each other by a second distance in the radial direction to define a second circumferential pumping gap which opens into the main circumferential pumping channel thereby constituting both an entrance to the main circumferential pumping channel and an exit of the auxiliary circumferential pumping channel, and the second distance is greater than the first distance; positioning a substrate on the substrate support; processing the substrate by introducing gas into a process region of the process chamber, disposed radially inwardly of the main circumferential pumping channel, through the one or more gas inlets, exciting the gas to form a plasma, depositing material on the substrate using the plasma, and removing gas in the process region of the process chamber from the apparatus through the auxiliary circumferential pumping channel via the entrance thereof constituted by the first circumferential pumping gap and subsequently through the main circumferential pumping channel directly via the second circumferential pumping gap that affords both the entrance to the main circumferential pumping channel and the exit of the auxiliary circumferential pumping channel, wherein the gas is removed via a flow path which includes the first circumferential pumping gap, the second circumferential pumping gap which is wider in the radial direction than the first circumferential pumping gap, and the main circumferential pumping channel which is disposed radially outwardly of the process region.

2. A method according to claim 1 in which gas is introduced into the process chamber at a flow rate of greater than 3000 sccm.

3. A method according to claim 1 in which the processing of the substrate comprises depositing silicon nitride onto the substrate.

4. A method according to claim 1 in which the processing of the substrate comprises depositing silicon dioxide, silicon oxynitride or amorphous silicon onto the substrate.

5. A method according to claim 1 in which, during the processing of the substrate, the pressure in the circumferential pumping channel is regulated to be within 5% of the pressure in the process chamber.

6. A method according to claim 1 in which a semiconductor substrate is positioned on the substrate support and is subjected to said processing.

7. A method according to claim 1 in which the upper and lower elements each are of dielectric material.

8. A method according to claim 1 in which the upper and lower elements each are of ceramic material.

9. A method according to claim 1 in which the upper and lower elements are annular, wherein the removing of gas from the apparatus comprises removing the gas through a first annular opening constituted by the first circumferential pumping gap and subsequently through the entrance to the main circumferential pumping channel constituted by the second circumferential gap, the entrance having the form of an annular opening whose radial width is greater than that of the first annular opening.

10. A method according to claim 1 further comprising providing an upper surface of the substrate support at a level below that of a portion of the main circumferential pumping channel during the processing of the substrate.

11. A method according to claim 1 in which gas is introduced into the processing region of the process chamber at a flow rate of greater than 5000 sccm.

12. A method according to claim 1 in which gas is introduced into the processing region of the process chamber at a flow rate of greater than 7000 sccm.

13. A method according to claim 1 in which, during the processing of the substrate, the pressure in the main circumferential pumping channel is regulated to be within 4% of the pressure in the processing region of the process chamber.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) Embodiments of apparatus and methods in accordance with the invention will now be described with reference to the accompanying drawings, in which:—

(2) FIG. 1 is a cross sectional view of a prior art PE-CVD apparatus;

(3) FIG. 2 shows silicon nitride deposition in the apparatus of FIG. 1;

(4) FIG. 3 is a cross sectional view of a PE-CVD apparatus of the invention;

(5) FIG. 4 shows silicon nitride deposition in the apparatus of FIG. 3; and

(6) FIG. 5 is a graph of deposition thickness and thickness non-uniformity against number of wafers processed.

DETAIL DESCRIPTION OF EMBODIMENTS

(7) FIG. 3 shows a PE-CVD apparatus, depicted generally at 30, comprising a chamber 32 having a substrate support 34 positioned therein. The substrate support 34 may be a platen on which a semiconductor wafer can be positioned. Typically, the platen can be moved between a lowered position for receiving the wafer and a raised, in-use, position for processing the wafer by PE-CVD. FIG. 3 shows the platen 34 in the raised, in-use, position. The apparatus 30 further comprises a showerhead 36 positioned at the top of the chamber 32. The showerhead 36 comprises a plurality of gas inlets which allows a desired gas or gaseous mixture to be introduced into the chamber 32 from a gas supply system (not shown). Typically, a gaseous mixture is supplied to the chamber 32 which comprises one or more process gases in combination with one or more carrier gases. A plasma is created in the main chamber 32 using a plasma production device (not shown). This leads to deposition of material on the semiconductor wafer by a desired process. PE-CVD processes and associated plasma production devices are well known to the skilled reader. In one embodiment, the apparatus 30 shown in FIG. 3 can be implemented using a capacitively coupled plasma production device. The apparatus 30 further comprises an upper element 38 and a lower element 40. The upper and lower elements 38, 40 are each in the form of a ceramic spacer.

(8) The chamber 32 comprises first and second step sections 32(a), 32(b). The first step section 32(a) receives the lower element 40, which is an annular ring structure having an L shape cross section. The second step section 32(a) in combination with the upper element 38 defines a main circumferential pumping channel 42.

(9) The ceramic upper and lower elements 38, 40 can be used for one or more known purposes such as changing the earth plane of the apparatus, influencing the shape of the plasma, and protecting the apparatus from the plasma. In particular, the upper element 38 is of annular form and is positioned to surround the wafer and the uppermost part of the substrate support 34. This acts to confine the plasma. The lower element 40 acts to protect the walls of the chamber 32 from the plasma. Additionally, the upper and lower elements 38, 40 define part of the flow path which gases flow along as they are exhausted from the chamber 32. The upper element 38 is spaced apart from the substrate support 34 to define a first pumping gap. Gases flowing through the first pumping gap then enter a region 44 which can be described as an auxiliary pumping channel. The auxiliary pumping channel is defined by the lower element 40 and the side region of the wafer support 34. The uppermost portion of the lower element 38 and the lowermost portion of the upper element 40 define a second pumping channel which leads to the main circumferential pumping channel 42. The main circumferential pumping chamber 42 is in gas conducting communication with a pumping port 46. The pumping port 46 is shown in FIG. 4, which also shows a wafer entry port 48. The pumping port 46 is connected to a vacuum line (not shown) which includes a suitable pump. The vacuum line can be of essentially conventional construction.

(10) Experiments were performed using the prior art apparatus of FIG. 1 and the apparatus of the invention shown in FIG. 3. Silicon nitride was deposited in both chambers. FIG. 2 shows that silicon nitride is deposited in an area 27 denoted by the symbol X using the prior art apparatus. FIG. 4 shows that silicon nitride was deposited at locations 50 denoted by the symbol X using the apparatus of the invention. It can be seen that the prior art apparatus gives rise to a highly asymmetrical deposition of silicon nitride. In contrast, with the apparatus of FIG. 3, the deposition of silicon nitride is spread far more evenly throughout the chamber. This is the consequence that the thickness of the silicon nitride deposition on the chamber of the invention is reduced. In comparison, the prior art apparatus gives rise to areas of a relatively high thickness of deposited silicon nitride. A consequence of the thicker deposition obtained with the prior art apparatus is that it requires a longer clean time to remove the deposited material. Experiments were performed running a low temperature “via reveal” application to produce a SiN/SiN/SiO stack. It was found that in comparison to the prior art apparatus, the apparatus of the invention gives rise to a reduction in clean time from 720 to 130 seconds. This will give rise to a consequent and substantial improvement in throughput. It is also noted that a further consequence of the asymmetric deposition pattern shown in FIG. 2 is that areas having a thinner deposition layer will be over cleaned.

(11) Experiments were also performed to investigate the effect of the present invention on the film properties and process parameters for PE-CVD deposition of silicon nitride and silicon oxide using a range of process recipes. The experiments were performed using a number of 300 mm diameter silicon wafer substrates. Table 1 shows important dielectric film properties. It can be seen that the properties of the films obtained using the invention compare highly favourably with the equivalent films obtained using the prior art apparatus. In fact, the measured properties obtained using the prior art apparatus and the apparatus of the invention agree to within the relevant error bands for the measurements. Also, it has been found that the end point signal (an optical measurement of excited free radical fluorine species in the plasma) and DC bias signal profiles are very similar using identical NF.sub.3 clean recipe with both kinds of apparatus. Additionally, the apparatus of the invention has been found to have no effect on the electrical and optical characteristics of C.sub.3F.sub.8/O.sub.2 cleans as well.

(12) TABLE-US-00001 TABLE 1 Comparison of essential dielectric test film properties with prior art apparatus and apparatus of the invention. Dep. Rate/ Non-uniformity/ Stress/ Leakage@ Breakdown/ Process Apparatus nm .Math. min.sup.−1 % range .Math. 2mean.sup.−1 RI Mpa 2 MV .Math. cm.sup.−1 MV .Math. cm.sup.−1 Compressive Prior Art 369 3.9 1.9234 −329 2E−10 10 SiN1 Invention 376 3.9 1.9352 −349 5E−10 11 Compressive Prior Art 329 4.2 1.9575 −30 6E−10 9 SiN2 Invention 329 4.5 1.9552 −33 7E−10 10 Tensile SiN Prior Art 205 4.1 1.8984 227 5E−10 11 Invention 203 4.1 1.8993 229 2E−10 11 TEOS SiO Prior Art 637 3.5 1.4525 17 3E−10 12 Invention 635 2.1 1.4515 15 5E−10 13

(13) Table 2 shows the measured pressures in the main chamber and the circumferential pumping chamber of the prior art apparatus of FIG. 1 and the apparatus of the invention of FIG. 3. It can be seen that the prior art apparatus gives rise to a significant pressure differential between the main chamber and the circumferential pumping chamber. This is easily rationalised in terms of the restricted pumping gaps 22, 24 which lead to the circumferential pumping channel 26. As explained above, this is a deliberate design feature intended to reduce gas conduction in order to achieve a radial flow across the wafer. In contrast, the present invention provides a much reduced pressure differential between the chamber and the circumferential pumping channel. It is not presently confirmed whether the flow across the wafer is radial or not. Without wishing to be limited by any particular theory or conjecture, it is believed that it can be rationalised in terms of the larger second pumping gap defined by the spaced apart upper and lower elements 38, 40. It is also possible that the flow path and/or volume of the auxiliary circumferential pumping chamber 44 plays a role. It is noted that the absolute pressure in the main chamber of both the prior art apparatus and the apparatus of the invention during the PE-CVD process was the same, even though the gas conductance is higher with the present invention. This was achieved by controlling a throttle valve on the exhaust line.

(14) TABLE-US-00002 TABLE 2 The difference between chamber pressure (controlled by throttle valve) and pumping channel pressure for four different dielectric recipes. Chamber Pumping Channel Pumping Channel Pressure/ Pressure (Prior Art)/ Pressure (Invention)/ Process mT mT mT Compressive 2100 1925 2040 SiN1 Compressive 1999 1815 1940 SiN2 Tensile SiN 1999 1865 1945 TEOS SiO 3099 2940 3005

(15) FIG. 5 shows wafer to wafer film thicknesses for a typical via reveal SiN/SiO.sub.2 stack obtained using the apparatus of FIG. 3. Cleans were performed between the processing of consecutive wafers. In FIG. 5, the diamond symbols 52 relate to the SiO.sub.2 film, the square symbols 54 relate to silicon nitride deposited film, and the triangle symbols 56 relate to the thickness of the overall stack. FIG. 5 also shows the non-uniformity of the overall stack. The X symbols 58 refer to stack non-uniformity data. It could be seen that the apparatus of the present invention gives rise to excellent film properties.

(16) It is believed that the present invention provides particularly good results when using in conjunction with PE-CVD processes having high gas flow rates. However, the invention is not limited to high flow rate processes. The advantageous effects provided by the invention are not thought to be limited to the precise process recipe used. To the contrary, the invention is believed to be applicable to a wide range of deposition recipes to provide a wide range of deposited materials such as silicon oxide, silicon oxynitride and amorphous silicon.