Semiconductor device and method for manufacturing the semiconductor device
09786587 · 2017-10-10
Assignee
Inventors
- Tatsuo Nishizawa (Matsumoto, JP)
- Shinji Tada (Hino, JP)
- Yoshito Kinoshita (Nagano, JP)
- Yoshinari Ikeda (Matsumoto, JP)
- Eiji Mochizuki (Matsumoto, JP)
Cpc classification
H01L2924/15787
ELECTRICITY
H01L2224/13076
ELECTRICITY
H01L2924/00012
ELECTRICITY
H01L2224/81193
ELECTRICITY
H01L2224/131
ELECTRICITY
H01L2224/291
ELECTRICITY
H01L2224/48111
ELECTRICITY
H01L2224/49113
ELECTRICITY
H01L2224/32225
ELECTRICITY
H01L2224/131
ELECTRICITY
H01L2924/15787
ELECTRICITY
H01L2224/32225
ELECTRICITY
H01L2924/00
ELECTRICITY
H01L23/49833
ELECTRICITY
H01L2924/00
ELECTRICITY
H01L2224/13011
ELECTRICITY
H01L2924/00014
ELECTRICITY
H01L2224/81898
ELECTRICITY
H01L2224/49111
ELECTRICITY
H01L2924/00014
ELECTRICITY
H01L2224/83192
ELECTRICITY
H01L2924/00012
ELECTRICITY
H01L23/24
ELECTRICITY
H01L2224/16235
ELECTRICITY
H01L2224/83192
ELECTRICITY
H01L23/49811
ELECTRICITY
H01L2224/291
ELECTRICITY
H01L24/73
ELECTRICITY
H01L23/3735
ELECTRICITY
International classification
H01L23/498
ELECTRICITY
H01L23/373
ELECTRICITY
H01L23/433
ELECTRICITY
H01L25/07
ELECTRICITY
Abstract
A semiconductor device is disclosed in which an implant board and a semiconductor element of a semiconductor mounting board are bonded and electrically connected through implant pins and which can be manufactured with high productivity. Implant pins are bonded to a semiconductor element and/or a circuit pattern of a semiconductor mounting board through cylindrical terminals press-fitted into the other ends of the implant pins. Press-fitting depth L2 of each of the implant pins into corresponding cylindrical terminals is adjustable, so that total length of the implant pin and cylindrical terminal which are press-fitted to each other matches up with the distance between the semiconductor element and/or the circuit pattern on the semiconductor mounting board and an implant board.
Claims
1. A semiconductor device, comprising: an insulated wiring substrate provided with a first circuit pattern and a second circuit pattern, a first semiconductor element mounted on the first circuit pattern, an implant substrate provided with a first via hole and a second via hole for electrically connecting therethrough, and an insulated substrate having print wiring, a first implant pin having one end and another end, and a second implant pin having one end and another end, and a first tube-shaped terminal provided on the second circuit pattern, with one end of the first implant pin being pressed into the first via hole, and one end of the second implant pin being pressed into the second via hole, wherein a distance between the semiconductor element and the implant substrate, and a distance between the second circuit pattern and the implant substrate differ, and by the other end of the first implant pin joining the first semiconductor element, and the other end of the second implant pin being pressed into the first tube-shaped terminal, the first semiconductor element and the second circuit pattern are electrically connected.
2. The semiconductor device according to claim 1, wherein a total length of the second implant pin with the first tube-shaped terminal pressed therein and the first tube-shaped terminal conforms to the distance of the second circuit pattern and the implant substrate.
3. The semiconductor device according to claim 1, wherein the length of the first implant pin and the length of the second implant pin are substantially equal.
4. The semiconductor device according to claim 3, wherein the length of the first implant pin and the length of the second implant pin are 3 mm or more and 5 mm or less.
5. The semiconductor device according to claim 1, wherein the second circuit pattern is provided with a hole or a concave portion, and the first tube-shaped terminal is pressed into the hole or concave portion.
6. The semiconductor device according to claim 1, wherein the second circuit pattern is provided with a hole or a concave portion, and the first tube-shaped terminal is fixed to the hole or concave portion via soldering or a sintered material.
7. The semiconductor device according to claim 1, wherein the semiconductor device further comprises: a second semiconductor element mounted on the first circuit pattern, a second tube-shaped terminal joined to the second semiconductor element, and a third implant pin having one end and another end, with the one end pressed into a third via hole of the implant substrate, wherein the second semiconductor element and the second circuit pattern are electrically connected by the other end of the third implant pin being pressed into the second tube-shaped terminal.
8. The semiconductor device according to claim 7, wherein the second semiconductor element is thinner than the first semiconductor element, and a distance between the second semiconductor element and the implant substrate, and a distance between the second circuit pattern and the implant substrate differ.
9. The semiconductor device according to claim 8, wherein the total length of the second tube-shaped terminal and the third implant pin pressed into the second tube-shaped terminal conforms to the distance of the second semiconductor element and the implant substrate.
10. The semiconductor device according to claim 1, wherein a plating layer is provided on a pressed portion surface of the second implant pin to the first tube-shaped terminal and/or an inner peripheral face of the first tube-shaped terminal, the plating layer is melted by being heated with the second implant pin pressed into the first tube-shaped terminal, and a contact portion of the second implant pin and the first tube-shaped terminal are joined by this plating layer.
11. The semiconductor device according to claim 1, where a sintering material is applied on a pressed portion surface of the second implant pin to the first tube-shaped terminal and/or an inner peripheral face of the first tube-shaped terminal, the sintering material is sintered by being heated with the second implant pin pressed into the first tube-shaped terminal, and a contact portion of the second implant pin and the first tube-shaped terminal are joined.
12. The semiconductor device according to claim 1, wherein in a cross-section of a direction perpendicular to the second implant pin in a contact portion of the inner peripheral face of the second implant pin and the first tube-shaped terminal, the second implant pin contacts 40% or more of the inner periphery of the first tube-shaped terminal.
13. The semiconductor device according to claim 1, wherein a protrusion portion that protrudes to the outer periphery by a drawing process is provided on a pressed portion of the second implant pin to the first tube-shaped terminal, and this protrusion portion contacts the inner peripheral face of the first tube-shaped terminal.
14. The semiconductor device according to claim 13, wherein a value subtracting an inner diameter of the first tube-shaped terminal from a maximum diameter of the pressed portion of the second implant pin before pressing is between 0 and 0.25 mm.
15. The semiconductor according to claim 1, wherein a straight column-shaped portion with no drawing process is provided on a pressed portion of the second implant pin, and at least one portion of this column-shaped portion contacts the inner peripheral face of the first tube-shaped terminal.
16. The semiconductor device according to claim 15, wherein a value subtracting an inner diameter of the first tube-shaped terminal from a maximum diameter of the pressed portion of the second implant pin before pressing is between 0 and 0.15 mm.
17. The semiconductor device according to claim 1, wherein a tip end of the first tube-shaped terminal side of the second implant pin has a reduced tapered diameter toward the tip end.
18. The semiconductor device according to claim 1, wherein the inner periphery of the first tube-shaped terminal makes a shape that conforms to the pressed portion of the second implant pin.
19. A semiconductor device comprising: an insulated wiring substrate provided with a circuit pattern, a semiconductor element mounted on the circuit pattern, an implant substrate with a first via hole and a second via hole for electrically connecting provided thereon, provided with an insulated substrate having print wiring, a first implant pin having one end and another end, and a second implant pin having one end and another end, and a tube-shaped terminal provided on the circuit pattern, with one end of the first implant pin being pressed into the first via hole, and one end of the second implant pin being pressed into the second via hole, wherein a distance between the semiconductor element and the implant substrate, and a distance between the circuit pattern and the implant substrate differ, and by the other end of the first implant pin joining the semiconductor element, and the other end of the second implant pin being pressed into the tube-shaped terminal, the semiconductor element and the second implant pin are electrically connected.
20. The semiconductor device according to claim 19, wherein the circuit pattern is provided with a hole or a concave portion, and the tube-shaped terminal is pressed into the hole or concave portion, or fixed to the hole or concave portion via soldering or a sintering material.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
(1) The foregoing advantages and features of the invention will become apparent upon reference to the following detailed description and the accompanying drawings, of which:
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DETAILED DESCRIPTION OF SPECIFIC EMBODIMENTS
(16) A semiconductor device according to the invention will be described with reference to the drawings. An embodiment of the semiconductor device according to the invention is shown in
(17) In the semiconductor device, cooling plate 1 is arranged in a bottom portion of resin casing 2. Cooling plate 1 is made of a material having high heat dissipation. For example, copper, aluminum, a copper alloy, an aluminum alloy, etc. may be used as the material of cooling plate 1.
(18) Insulating wiring board 3 is arranged on cooling plate 1. Insulating wiring board 3 is formed in such a manner that metal layers 5 and 6 are bonded to opposite surfaces of insulating substrate 4. A predetermined circuit pattern is formed on insulating substrate 4 by metal layer 5. Metal layer 6 of insulating wiring board 3 and cooling plate 1 are bonded through a solder or sinter material layer 7a.
(19) There is no particular limitation on insulating wiring board 3. For example, a direct bonding copper board in which a copper plate is bonded directly on a ceramic substrate, an active metal brazed copper board in which ceramics and a copper plate are bonded through a brazing material, or the like, may be used as insulating wiring board 3.
(20) External terminals 9 are bonded to predetermined places of metal layer 5 forming the circuit pattern of insulating wiring board 3, through a solder or sinter material layer 7b. In addition, a plurality of semiconductor elements 8a and 8b are bonded to the same metal layer 5 through a solder or sinter material layer 7c. Each of semiconductor elements 8a and 8b varies according to use purposes. For example, a power semiconductor element such as an IGBT, a rectifier element such as an FWD, etc. may be used as semiconductor element 8a, 8b.
(21) Implant board 30 is disposed above semiconductor element 8. Implant board 30 includes insulating wiring board 34, and implant pins 20 press-fitted into via holes 35. Insulating wiring board 34 is configured in such a manner that metal layers 32 and 33 forming a printed wiring are bonded to opposite surfaces of insulating substrate 31. Each of via holes 35 is formed to penetrate metal layer 32, insulating substrate 31 and metal layer 33 of insulating wiring board 34. A metal layer (not-shown) connected conductively to metal layer 32 and/or metal layer 33 is formed in an inner surface of each of via holes 35. The metal layer in the inner surface is connected conductively to implant pin 20.
(22) Lower ends of some of implant pins 20 of implant board 30 are press-fitted into cylindrical terminals 10. In the embodiment, implant pins 20 which do not have cylindrical terminals 10 are connected to semiconductor element 8a through a solder or sinter material layer 7e. Moreover, cylindrical terminals 10 in implant pins 20 having cylindrical terminals 10 are connected to semiconductor element 8b and metal layer 5 through a solder or sinter material layer 7d.
(23) Referring now to
(24) Press-fitting depth L2 of each of implant pins 20 into cylindrical terminals 10 is adjusted for each cylindrical terminal so as to match up with the distance between semiconductor element 8b and implant board 30 and the distance between metal layer 5 and implant board 30.
(25) That is, an implant board provided with implant pins having different lengths in accordance with the distance between semiconductor element 8 and implant board 30 and the distance between metal layer 5 and implant board 30 is not used in the invention. According to the invention, the press-fitting depth of each implant pin 20 into a corresponding cylindrical terminal 10 is changed in accordance with each of the distances. Thus, implant board 30 is bonded to semiconductor element 8 or metal layer 5 to make electric connection for each of the semiconductor elements. Therefore, it is not necessary to change the implant board in accordance with each kind of product so that the implant board can be used in common among a plurality of products.
(26) Incidentally, when the distance between implant board 30 and semiconductor element 8 or metal layer 5 matches up with the length of each implant pin 20 extending from implant board 30, implant pin 20 may be bonded to semiconductor element 8 or metal layer 5 not through cylindrical terminal 10. In the embodiment, the distance between implant board 30 and semiconductor element 8a matches up with the length of each implant pin 20 extended from implant board 30, so that implant pin 20 is bonded directly to semiconductor element 8a through a solder or sinter material layer 7e.
(27) In the semiconductor device according to the invention, it is preferable that each implant pin 20 is in contact with 40% or more of the inner circumference of cylindrical terminal 10 in a section taken along the line B-B in
(28) In the semiconductor device according to the invention, there is no particular limitation on the shape of implant pin 20. An implant pin having any shape such as a cylindrical shape or a prismatic shape can be used as implant pin 20. For example, any of the shapes shown in
(29) Implant pin 20a shown in
(30) The largest outer diameter R.sub.max of the press-fitting portion of implant pin 20 which has not yet been press-fitted is set so that a difference (R.sub.max−R) between the largest outer diameter R.sub.max and an inner diameter R of cylindrical terminal 10 is preferably in the range of from 0 to 0.15 mm. In addition, the difference (R.sub.max−R) between the largest outer diameter R.sub.max and the inner diameter R of cylindrical terminal 10 is more preferably in the range of from 0.05 mm to 0.15 mm, especially preferably in the range of from 0.05 mm to 0.10 mm. When the largest outer diameter R.sub.max is set such that the difference is within the aforementioned range, implant pin 20a can be press-fitted into cylindrical terminal 10 without causing any damage in implant pin 20a, any damage in cylindrical terminal 10, etc. so that implant pin 20a and cylindrical terminal 10 can be bonded to each other firmly.
(31) Each of implant pins 20b to 20d shown in
(32) The largest outer diameter R.sub.max of the press-fitting portion in each of implant pins 20b to 20d which has not yet been press-fitted is set so that a difference (R.sub.max−R) between the largest outer diameter R.sub.max and the inner diameter R of cylindrical terminal 10 is preferably in the range of from 0 to 0.25 mm. Moreover, the difference (R.sub.max−R) between the largest outer diameter R.sub.max and the inner diameter R of cylindrical terminal 10 is more preferably in the range of from 0.05 mm to 0.25 mm, particularly preferably in the range of from 0.10 mm to 0.20 mm. When the largest outer diameter R.sub.max is set so that the difference is within the aforementioned range, the implant pin can be press-fitted into cylindrical terminal 10 without causing any damage in the implant pin, any damage in cylindrical terminal 10, etc. so that the implant pin and cylindrical terminal 10 can be bonded to each other firmly.
(33) The inner circumference of cylindrical terminal 10 is preferably shaped like a hole which matches up with the press-fitting portion of implant pin 20. Since the inner circumference of cylindrical terminal 10 is formed into a shape which matches up with the press-fitting portion of implant pin 20, the contact area of implant pin 20 with the inner circumference of cylindrical terminal 10 can be made large. In addition, the ends of protruding portions 22 engage with the inner circumferences of cylindrical terminals 10 respectively so as to prevent rotation.
(34) The inside of resin casing 2 in the semiconductor device according to the invention is filled and sealed with sealing resin 15 such as a gel or an epoxy resin.
(35) Next, an embodiment of a semiconductor device manufacturing method according to the invention will be described as a method for manufacturing the aforementioned semiconductor device.
(36) First, a method for manufacturing implant board 30 will be described. Implant board 30 is manufactured as follows. Via holes 35 for electric connection are formed in predetermined positions of insulating wiring board 34 so as to penetrate metal layer 32, insulating substrate 31 and metal layer 33. After ends 27 of implant pins 20 are press-fitted into via holes 35, collar portions 26 of implant pins 20 and insulating wiring board 34 are bonded by bonding material 36.
(37) The method for manufacturing the semiconductor device will be described below.
(38) Insulating wiring board 3 is disposed on cooling plate 1 so that metal layer 6 side of insulating wiring board 3 can come into contact with cooling plate 1 through a solder or sinter material layer 7a. Moreover, semiconductor elements 8a and 8b are disposed on a predetermined circuit pattern of metal layer 5 of insulating wiring board 3 through a solder or sinter material layer 7c.
(39) Next, implant pins 20 extending from implant board 30 are press-fitted into cylindrical terminals 10. The press-fitting depth of each of implant pins 20 is adjusted so that the length of implant pin 20 can match up with the distance between semiconductor element 8b and implant board 30 or the distance between metal layer 5 and implant board 30.
(40) Implant board 30 is disposed above insulating wiring board 3. Cylindrical terminals 10 are disposed in predetermined positions of semiconductor element 8b and metal layer 5 through a solder or sinter material layer 7d. In addition thereto, implant pins 20 extending from implant board 30 are disposed on semiconductor element 8a through a solder or sinter material layer 7e.
(41) The semiconductor device is introduced into a reflow furnace in this state so that the solder or sinter material layers 7a, 7c, 7d and 7e are melted or sintered. Thus, cooling plate 1 and metal layer 6 of insulating wiring board 3 are bonded to each other. At the same time, bonding between semiconductor elements 8a and 8b and metal layer 5 of insulating wiring board 3, bonding between cylindrical terminals 10 and metal layer 5 of insulating wiring board 3, bonding between cylindrical terminals 10 and semiconductor element 8b and bonding between implant pins 20 and semiconductor element 8a are performed.
(42) The heating temperature in the reflow time is preferably not higher than 350° C., more preferably in the range of from 250° C. to 330° C. When the heating temperature is higher than 350° C., there is a fear that the semiconductor elements etc. may be thermally damaged.
(43) Next, external terminals 9 are disposed in predetermined positions of metal layer 5 through a solder or sinter material layer 7b. The solder or sinter material layer 7b is melted or sintered to bond external terminals 9 and metal layer 5 to each other. Cooling plate 1 is surrounded by resin casing 2. The inside enclosed by resin casing 2 is filled with sealing resin 15. The sealing resin is hardened. In this manner, the semiconductor device according to the invention is manufactured.
(44) Another embodiment of the semiconductor device according to the invention is shown in
(45) The thickness of plating layer 28 is preferably not larger than 5 μm prior to press-fitting. Plating layer 28 may be a single layer or may be a laminate of a plurality of plating layers. A layer or a laminate in which at least the outermost layer can be melted at a temperature not higher than 350° C. is preferably used. Sn plating, SnAg-based solder plating, SnBi-based solder plating, SnSb-based solder plating, SnCu-based solder plating, SnIn-based solder plating, etc. may be used as the plating material whose melting temperature is not higher than 350° C. When the melting temperature is not higher than 350° C., the plating material can be melted in the reflow process for soldering the semiconductor elements etc.
(46) Next, another embodiment of a semiconductor device manufacturing method according to the invention will be described as a method for manufacturing the aforementioned semiconductor device. In the embodiment, implant pins 20 extending from implant board 30 are press-fitted into cylindrical terminals 10 and the press-fitting depth of each of implant pins 20 is adjusted, in the same manner as in the aforementioned embodiment. In this manner, the length of each of implant pins 20 matches up with the distance between semiconductor element 8b and implant board 30 or the distance between metal layer 5 and implant board 30. Cylindrical terminals 10 are disposed in predetermined positions of semiconductor element 8b and metal layer 5 through the solder or sinter material layer 7d. Moreover, implant pins 20 extending from implant board 30 are disposed on semiconductor element 8a through the solder or sinter material layer 7e.
(47) The semiconductor device is introduced into a reflow furnace in this state so that the solder or sinter material layers 7a, 7c, 7d and 7e and plating layer 28 are melted or sintered. Thus, through the solder or sinter material layers 7a, 7c, 7d and 7e, cooling plate 1 and metal layer 6 of insulating wiring board 3 are bonded to each other. At the same time, bonding between semiconductor elements 8a and 8b and metal layer 5 of insulating wiring board 3, bonding between cylindrical terminals 10 and metal layer 5 of insulating wiring board 3, bonding between cylindrical terminals 10 and semiconductor element 8b, and bonding between implant pins 20 and semiconductor element 8a are performed. In addition, implant pins 20 and cylindrical terminals 10 are bonded to each other respectively through plating layer 28.
(48) The heating temperature in the reflow time is preferably not higher than 350° C., more preferably in the range of from 250° C. to 330° C. When the heating temperature is higher than 350° C., there is a fear that the semiconductor elements etc. may be thermally damaged.
(49) External terminals 9 are disposed in predetermined positions of metal layer 5 through the solder or sinter material layer 7b. When the solder or sinter material layer 7b is melted or sintered, metal layer 5 and external terminals 9 are bonded to each other. Further, cooling plate 1 is surrounded by resin casing 2. The internal portion enclosed by resin casing 2 is filled with sealing resin 15. The sealing resin is hardened. In this manner, the semiconductor device is manufactured.
(50) Further another embodiment of the semiconductor device according to the invention is shown in
(51) A sinter material which can be sintered at a temperature not higher than 350° C. is preferably used as sinter material 29. For example, an Ag-based sinter material, a Cu-based sinter material, etc. may be used as sinter material 29. When the sintering temperature is not higher than 350° C., the sinter material can be sintered in the reflow process for soldering the semiconductor elements etc.
(52) Next, another embodiment of a semiconductor device manufacturing method according to the invention will be described as a method for manufacturing the aforementioned semiconductor device.
(53) In the embodiment, sinter material 29 is applied to the inner circumferential surfaces of cylindrical terminals 10 and/or the press-fitting portions of implant pins 20 into cylindrical terminals 10. Then, implant pins 20 extending from implant board 30 are press-fitted into cylindrical terminals 10 and the press-fitting depths of implant pins 20 are adjusted. In this manner, the lengths of implant pins 20 match up with the distance between semiconductor element 8b and implant board 30 and the distance between metal layer 5 and implant board 30. Cylindrical terminals 10 are disposed in predetermined positions of semiconductor element 8b and metal layer 5 through the solder or sinter material layer 7d. Moreover, implant pins 20 extending from implant board 30 are disposed on semiconductor element 8a through the solder or sinter material layer 7e.
(54) The semiconductor device is introduced into a reflow furnace in this state so that the solder or sinter material layers 7a, 7c, 7d and 7e and sinter material 29 are melted or sintered. Thus, through the solder or sinter material layers 7a, 7c, 7d and 7e, cooling plate 1 and metal layer 6 of insulating wiring board 3 are bonded to each other. At the same time, bonding between the semiconductor elements 8a and 8b and metal layer 5 of insulating wiring board 3, bonding between cylindrical terminals 10 and metal layer 5 of insulating wiring board 3, bonding between cylindrical terminals 10 and semiconductor element 8b, and bonding between implant pins 20 and semiconductor element 8a are performed. In addition thereto, implant pins 20 and cylindrical terminals 10 are bonded to each other by sintering of sinter material 29.
(55) The heating temperature in the reflow time is preferably not higher than 350° C., more preferably in the range of from 250° C. to 330° C. When the heating temperature is higher than 350° C., there is a fear that the semiconductor elements etc. may be thermally damaged.
(56) External terminals 9 are disposed in predetermined positions of metal layer 5 through the solder or sinter material layer 7b. When the solder or sinter material layer 7b is melted or sintered, metal layer 5 and external terminals 9 are bonded to each other. Further, cooling plate 1 is surrounded by resin casing 2. The internal portion enclosed by resin casing 2 is filled with the sealing resin 15. The sealing resin is hardened. In this manner, the semiconductor device is manufactured.
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(58) In this semiconductor device, a cooling plate 1 is disposed on a bottom portion of a resin case 2. An insulated wiring substrate 3 is disposed on the cooling plate 1. With the insulated wiring substrate 3, metal layers 5a and 5b are joined to a front face of an insulating substrate 4, and a metal layer 6 is joined to a back face. A predetermined circuit pattern is formed on the insulating substrate 4 by the metal layers 5a and 5b. The metal layer 6 of the insulated wiring substrate 3 and the cooling plate 1 are joined via soldering or a sintered material layer 7a.
(59) In a prescribed location of the metal layer 5a and 5b that configure the circuit pattern of the insulated wiring substrate 3, outer terminals 9L and 9R are joined via soldering or a sintered material layer 7b. Furthermore, a plurality of semiconductor elements 8a and 8b are joined to the metal layer 5a via soldering or a sintered material layer 7c. The semiconductor elements 8a and 8b may be vertical power semiconductor elements provided with electrodes on each of the front face and the back face. The semiconductor elements 8a and 8b are different depending on the intended use, but a power semiconductor element such as an IGBT, or a rectifying device such as an FWD are given as examples.
(60) An implant substrate 30 is arranged on the upper part of the front face side of the semiconductor element 8. The implant substrate 30 includes an insulated wiring substrate 34, an implant pin 20a pressed into a via hole 35a, an implant pin 20b pressed into a via hole 35b, and an implant pin 20c pressed into a via hole 35c. On both faces of the insulating substrate 31 of the insulated wiring substrate 34, metal layers 32 and 33 are formed, which form a print wiring. Via holes 35a, 35b, and 35c are formed penetrating the metal layer 32 of the insulated wiring substrate 34, the insulating substrate 31, and the metal layer 33. A metal layer, not shown in the drawings, that conducts to the metal layer 32 and the metal layer 33 on the inner face of the via holes 35a, 35b, and 35c, and this metal layer on the inner face is conductive with the implant pins 20a, 20b, and 20c. The implant pins 20a, 20b, and 20c each have one end and another end.
(61) The lower end of the implant pin 20b is pressed into a tube-shaped terminal 10b. The lower end of the implant pin 20c is pressed into a tube-shaped terminal 10c. The implant pin 20a is connected to the front face side of the semiconductor element 8a via soldering or a sintered material layer 7e. The tube-shaped terminal 10b is connected to the front face side of the semiconductor element 8b via soldering or the sintered material layer 7e. The metal layer 5b is provided with a hole 5bh or a concave portion 5bc as illustrated in
(62) As illustrated in
(63) A distance L3 between the semiconductor element 8a and the implant substrate 30, a distance L5 between the semiconductor element 8b and the implant substrate 30, and a distance L4 between the metal layer 5b and the implant substrate 30 may all be different from each other. Furthermore, the thickness of the semiconductor element 8b may be thinner than the semiconductor element 8a. A pressed depth L2 of the implant pins 20b and 20c to the tube-shaped terminals 10b and 10c can be adjusted. The pressed depth L2 (L2′) can be adjusted for each tube-shaped terminal so that the total length of the tube-shaped terminals 10b and 10c and the implant pins 20b and 20c pressed into the tube-shaped terminals 10b and 10c conform to the distance L5 of the semiconductor element 8b and the implant substrate 30 or to the distance L4 of the metal layer 5b and the implant substrate 30.
(64) In the present embodiment, depending on the distances L3 and L5 of the semiconductor element 8 and the implant substrate 30, and the distance L4 of the metal layer 5b and the implant substrate 30, an implant substrate provided with implant pins with different lengths is not used. In other words, the implant pins 20a, 20b, and 20c with substantially the same length may be used. By changing the pressed depth L2 (L2′) to the tube-shaped terminals 10b and 10c of the implant pins 20b and 20c based on the distances L3, L4, and L5, the implant substrate 30 and the semiconductor elements 8a and 8b or the metal layers 5b are connected. The outer terminals 9L and 9R, the metal layers 5a and 5b, and the semiconductor elements 8a and 8b are electrically connected. It is preferable for the implant pins 20a, 20b, and 20c to be 3 mm or more, and 5 mm or less.
(65) In
(66) The circuit pattern of the metal layer 5a, metal layer 5b, metal layers 32L and 33L, and metal layers 32R and 33R is different than the embodiment illustrated in
(67) Thus, a semiconductor device and a method for manufacturing the same have been described according to the present invention. Many modifications and variations may be made to the techniques and structures described and illustrated herein without departing from the spirit and scope of the invention. Accordingly, it should be understood that the methods and devices described herein are illustrative only and are not limiting upon the scope of the invention.
REFERENCE SIGNS LIST
(68) 1: cooling plate 2: resin casing 3: insulating wiring board 4: insulating substrate 5, 6: metal layer 7a, 7b, 7c, 7d, 7e: solder or sinter material layer 8, 8a, 8b: semiconductor element 9: external terminal 10: cylindrical terminal 15: sealing resin 20: implant pin 28: plating layer 29: sinter material 30: implant board 31: insulating substrate 32, 33: metal layer 34: insulating wiring board 35: via hole 36: bonding material 51: cooling plate 52: resin casing 53: insulating substrate 54, 55: metal layer 56: insulating wiring board 58: semiconductor element 59: external terminal 60: bonding wire 61: sealing resin 71: insulating substrate 72, 73: metal layer 74: via hole 75: insulating wiring board 76: implant pin 79: implant board