MICROMECHANICAL COMPONENT HAVING INTEGRATED PASSIVE ELECTRONIC COMPONENTS AND METHOD FOR ITS PRODUCTION

Abstract

The present invention relates to a micromechanical component (1), comprising a substrate (2), on which at least one layer sequence (3) is situated, which includes at least one micromechanical functional element, and on which at least one layer sequence (4) is situated that is able to act as at least one macroelectronic, passive component.

Claims

1-10. (canceled)

11. A micromechanical component, comprising: a substrate; and a plurality of layers situated one on top of the other in a stack on the substrate, the plurality of layers including a first layer sequence that forms a micromechanical functional element, and a second layer sequence that forms a macroelectronic, passive component, wherein at least one of the plurality of layers forms a portion of the micromechanical structure and is layered in the stack above the macroelectronic, passive component.

12. The micromechanical component as recited in claim 11, wherein the macroelectronic, passive component is a capacitor.

13. The micromechanical component as recited in claim 11, wherein the plurality of layers includes: at least one lower insulating layer covering at least parts of the substrate; at least one lower junction electrode situated on the lower insulating layer; at least one lower dielectric layer situated on the lower junction electrode; at least one upper junction electrode situated on the lower dielectric layer; and at least one upper insulating layer situated on the upper junction electrode; wherein electrodes of the macroelectronic, passive component are formed using the lower junction electrode and the upper junction electrode, and the upper insulating layer forms a portion of the micromechanical functional element.

14. The micromechanical component as recited in claim 13, wherein the first layer sequence includes a plurality of insulating layers and an upper functional layer, the upper functional layer including moveable functional elements in the form of seismic masses, the functional layer extending above the electrodes of the macroelectronic, passive component.

15. The micromechanical component as recited in claim 13, wherein the upper junction electrode includes printed circuit traces for the micromechanical functional element.

16. The micromechanical component as recited in claim 11, wherein the second layer sequence includes a stack of layers including at least one lower junction electrode, at least one lower dielectric layer situated on the lower junction electrode, and at least one upper junction electrode situated on the lower dielectric layer, and wherein at least some of the layers of the stack of the second layer sequence extend at least partially below the micromechanical functional element.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The present invention is explained in greater detail, using one exemplary embodiment. The figures show:

[0016] FIG. 1 the construction in principle of a micromechanical component according to the present invention;

[0017] FIG. 2 the construction in principle of a micromechanical component according to the present invention, having an underlayed passive component;

[0018] FIG. 3 a detailed sectional representation of a micromechanical component according to the present invention and

[0019] FIG. 4 a schematic representation of a functional unit having a micromechanical component according to the present invention.

SPECIFIC EMBODIMENT OF THE INVENTION

[0020] FIG. 1 shows the construction in principle of a micromechanical component 1 according to the present invention. On a common substrate 2 made of monocrystalline silicon, it has at least one functional area 3 which includes at least one micromechanical functional element. On the same substrate 2, according to the present invention, there is an additional functional area 4, which includes a structure, applied by microprocessing technology, that is able to act as at least one macroelectronic, passive component. Functional areas 3, 4, within the meaning of the present invention, are processed layer sequences, in this context, having definable functionality, if necessary, while assigning individual layers to several functional regions.

[0021] FIG. 2 shows the construction in principle of a micromechanical component 1 according to the present invention, having an underlayed passive component. Functional regions 3, 4, introduced in FIG. 1, in this case lie at least partially in different planes of micromechanical component 1, which develops the advantages of serial processing and makes possible space-saving designs.

[0022] FIG. 3 shows a detailed sectional representation of a micromechanical component 1 according to the present invention, in which there is a layer stack, underneath a region having micromechanical functional elements, which is able to act as a capacitor. The system is located on a Si substrate 2, which is covered by an insulating layer 5. Insulating layer 5 is made up of a thermal oxide that is produced in a known manner (e.g. including 2.5 μm field oxide). On top of it there is a lower junction electrode 6, in the present diagram in the form of a layer of doped polycrystalline silicon 275 nm in thickness, three-valent or five-valent elements (e.g. P, As, B) being used as doping agents, since both conductivity types are suitable for the development of the electrode. On lower junction electrode 6 there is a layer 7 that acts as a dielectric, which is developed as a so-called ONO stack (oxide-nitride-oxide). In the present example, the stack begins with a layer of thermal oxide 27 nm in thickness. On top of that there is a reactively deposited nitride layer 15 nm in thickness (depositing by LPCVD). This is followed by an oxide layer of 5 nm thickness made of reoxidized nitride. Directly over the dielectric, there is an upper junction electrode 8 made of polycrystalline silicon 450 nm in thickness. This device may be used as a surface capacitor. In response to appropriate patterning of electrodes 6, 8, several independent capacitors may also be produced in one plane.

[0023] On the layer stack described, which is able to act as a capacitor, there is an additional layer stack which has at least one micromechanical functional layer in the usual way, which in the present case includes specifically deflectable seismic masses for measuring accelerations. This upper stack includes, in detail, a plurality of insulating layers 9, 10, 11, which are used simultaneously for mechanical profiling of the further construction, volumes 12 that are intermittently filled with the material of a sacrificial layer, as well as the actual mechanical functional layer 13 which, after the dissolving out of the sacrificial layer in an appropriate etching step, includes movable functional elements in the form of seismic masses 14. Regions to be contacted have a metallization layer 15, in addition.

[0024] The two layer stacks shown do not have to overlap over their whole surface. The exemplary layer construction has a capacity of approximately 1.1 nF/mm.sup.2. Especially when using the capacitors, integrated in the manner according to the present invention, as buffer capacitors for microelectronic circuits, it is, however, expedient if at least parts of substrate 2 are covered by at least one insulating layer 5, on which there is located at least one lower plate electrode 6, on which there is located at least one upper plate electrode 8, on which there is located at least one insulating layer 9, as component of a layer sequence that includes at least one micromechanical functional element, that is, there is present at least one partial overlapping of the two layer stacks and functional regions 3, 4 of micromechanical component 1, according to the present invention.

[0025] In addition, for reasons of a minimized interaction between the individual functional regions 3, 4, it is advantageous if surface areas of the substrate, over which layer stacks are located that are utilized as passive electronic components, lie within the range of the bonding frame. In this case, the chip size of a micromechanical component, such as in an acceleration or yaw rate sensor, is not increased, unless the area of the bonding frame has to be increased, because of the increased number of contact pads that are now also required for contacting the passive components. One should understand bonding frame to mean the area used by a micromechanical component for the encapsulation of the sensor structure using an encapsulation structure as connecting surface.

[0026] One advantageous specialty of this exemplary embodiment is that a conductive layer is used in the process plane as upper junction electrode 8, in which layer are also located the lower contacting traces of the micromechanical layer stack that is located above the capacitor structure, the contacting traces being developed in the form of buried printed-circuit traces. This makes no basic requirement on systems according to the present invention. However, it is at least advantageous if the upper junction electrode lies at least partially in a plane with printed-circuit traces developed as buried printed-circuit traces for contacting areas to be contacted of the layer sequence lying above them, since in this case a common processing is able to take place of the printed-circuit traces and electrode surfaces required for both functional areas.

[0027] Corresponding to the present exemplary embodiment, individual details may be supplemented or replaced by modifications functioning in the same way, particularly of the materials used and the dimensions selected. For example, against the background of microprocess technology, other dielectric layers, especially IC-compatible dielectrics having a particularly high relative permittivity and a good temperature stability may be used and preferred, since the dielectrics have to withstand doping processes and epitaxy processes.

[0028] FIG. 4 shows a schematic representation of a functional unit 20 having a micromechanical component 1 according to the present invention. In it, a micromechanical component 1 is combined with at least one microelectronic component 16, to form a functional unit 20, there being an interconnection inside functional unit 20 which incorporates capacitors 17, integrated into the micromechanical component, as buffer capacitors for microelectronic component 16. As micromechanical functional region 3, micromechanical component 1 includes an acceleration-sensitive module having a seismic mass, whose deflection is ascertained and evaluated by an evaluation circuit in the form of an ASIC as microelectronic component 16. Capacitors 17 integrated into micromechanical component 1 are utilized as buffer capacitors for ASIC 16, and are connected to it via corresponding lines 18. Alternatively, separate wiring of integrated capacitors 17 for other purposes is possible. Entire functional unit 20 is accommodated in a mold-housing 19, whereby a separate printed-circuit board for external interconnection may be saved or reduced in area.

[0029] One advantage of the present invention is that no complete IC process is required for the preparation for the integrated passive components, but simply the broadening of a method for producing the usual MEMS stacks is sufficient for producing components designed according to the present invention. In the present exemplary embodiment, this takes place by a method according to which a layer sequence is formed which is able to act as at least one buffer capacitor, in that, after the application of an insulating layer, preferably in the form of a thermal oxide layer, the following process steps are included in the method on a wafer of monocrystalline silicon: [0030] depositing a first polycrystalline silicon layer on a silicon substrate; [0031] doping the polycrystalline silicon layer, in order to make it conductive as the lower junction electrode; [0032] cleaning the polycrystalline silicon layer using hydrofluoric acid, in order to remove an oxide layer close to the surface that appears after the doping; [0033] photolithographic masking of the polycrystalline silicon layer; [0034] etching patterning of the polycrystalline silicon layer, by which the geometry of the lower junction electrode is established; [0035] removing the remaining photoresist from the future electrode surface; [0036] depositing an oxide-nitride-oxide dielectric based on silicon, which is first begun by reactive depositing of a silicon dioxide layer, is continued by reactive depositing of a silicon nitride layer (Si.sub.3N.sub.4), and is then finished by a near-surface reoxidation of the silicon nitride layer; [0037] photolithographic masking of the oxide-nitride-oxide dielectric, [0038] etching patterning of the oxide-nitride-oxide dielectric, the patterning of the lower oxide layer in the layer stack of the dielectric taking place in a wet-chemical etching step; [0039] removing the remaining photoresist from the dielectric; [0040] installing a layer having buried printed-circuit traces.

[0041] The installation of the layer having buried printed-circuit traces represents a process step which contributes to the development of both functional regions of a micromechanical component according to the present invention. Depending on the contacting, conducting areas of this layer form an upper junction electrode of a capacitor structure lying below it, or lower contacting means of a micromechanical structure lying above it.

[0042] The broadening of the method according to the present invention brings about only slight additional costs for the integration of passive components, especially for the integration of large-area and simply patterned components, such as surface capacitors. These additional costs, for a backup capacitor of 1-2 nF, i less than one cent per chip.