INTERFACE CIRCUITS AND COMMUNICATION SYSTEM FOR COUPLING A HOST DEVICE TO AN ACCESSORY DEVICE AND METHOD FOR COMMUNICATION BETWEEN SUCH DEVICES

Abstract

A host interface circuit operates in a power mode when connected to an accessory device compatible with a power supply via a first line of a data cable. During power mode, the host interface circuit couples a power regulator to the first line. The host interface circuit operates in a legacy mode when connected to an accessory device not compatible with such a power supply and couples the legacy terminal to the first line during legacy mode. An accessory interface circuit configured to operate in a power mode when connected to a host device capable of a power supply via a first line couples a power input of an active device to the first line and a data input of the active device to a second line during power mode.

Claims

1. Host interface circuit (IF1) to be implemented in a host device (HDEV) with a processing unit (HPROC), the host interface circuit (IF1) suitable for coupling the host device (HDEV) to an accessory device (ADEV) via a data cable (4PAC), the host interface circuit (IF1) comprising a power regulator (PR) and a legacy terminal (MICS) and configured to operate in a power mode of operation when connected to an accessory device (ADEV) being compatible with a power supply via a first line (LM) of the data cable (4PAC); to couple the power regulator (PR) to the first line (LM) when operating in the power mode; to operate in a legacy mode of operation when connected to an accessory device (ADEV) being not compatible with a power supply via the first line (LM); and to couple the legacy terminal (MICS) to the first line (LM) when operating in the legacy mode.

2. Host interface circuit (IF1) according to claim 1, configured to determine if the accessory device (ADEV) is compatible with a power supply via the power regulator (PR) based on an identification signal.

3. Host interface circuit (IF1) according to claim 2, configured to detect the identification signal being received from the accessory device (ADEV) via the first line (LM), when the host device (HDEV) is connected to the accessory device (ADEV).

4. Host interface circuit (IF1) according to one of claims 1 to 3, configured to operate in the legacy mode after a start-up of the host-interface circuit (IF1).

5. Host interface circuit (IF1) according to one of claims 1 to 4, wherein the host device is a mobile communication device and/or a sound reproducing device.

6. Host interface circuit (IF1) according to claim 5, configured to operate in a call mode of operation when connected to an accessory device (ADEV) being compatible with a power supply via the first line (LM); and, when operating in the call mode, to couple the power regulator (PR) to the first line (LM); and to couple the legacy terminal (MICS) to a second line (LR) of the data cable (4PAC).

7. Host interface circuit (IF1) according to claim 6, configured to detect a host call signal from the processing unit (HPROC); to detect an accessory call signal received from the accessory device (ADEV) via the first line (LM); and to trigger the operation in the call mode when at least one of the host call signal and the accessory call signal is detected.

8. Host interface circuit (IF1) according to claim 7, configured to generate an uplink call signal to be transmitted to the accessory device (ADEV) via the first line (LM) after the triggering of the operation in the call mode.

9. Host interface circuit (IF1) according to one of claims 1 to 8, configured to, in particular when operating in the power mode, detect a button signal from the accessory device (ADEV) via the first line (LM); to generate an adapted button signal based on the button signal; and to provide the adapted button signal to the processing unit (HPROC).

10. Accessory interface circuit (IF2) to be implemented in an accessory device (ADEV) containing an active device (AUD), the accessory interface circuit (IF2) suitable for coupling the accessory device (ADEV) to a host device (HDEV) via a data cable (4PAC), the accessory interface circuit (IF2) configured to operate in a power mode of operation when connected to a host device (HDEV) being capable of providing a power supply for operating the active device (AUD) via a first line (LM) of the data cable (4PAC); to couple a power input of the active device (AUD) to the first line (LM) when operating in the power mode; and to couple a data input of the active device (AUD) to a second line (LR) of the data cable (4PAC) when operating in the power mode.

11. Accessory interface circuit (IF2) according to claim 10, configured to determine if the host device (HDEV) is capable of providing a power supply for operating the active device (AUD) based on an answer signal.

12. Accessory interface circuit (IF2) according to claim 11, configured to generate an identification signal to be transmitted to the host device (HDEV) via the first line (LM) when the accessory device (ADEV) is connected to the host device (HDEV); to detect the answer signal being received from the host device (HDEV) via the first line (LM) in response to the identification signal.

13. Accessory interface circuit (IF2) according to one of claims 10 to 12, wherein the active device (AUD) is an active audio device and wherein the accessory interface circuit (IF2) further comprises a microphone (MIC) and is further configured to operate in a legacy mode of operation when connected to a host device (HDEV) being not capable of providing a power supply for operating the active device (AUD) via the first line (LM); and to couple the microphone (MIC) to the first line (LM) when operating in the legacy mode.

14. Accessory interface circuit (IF2) according claim 13, configured to operate in a call mode of operation if the host device (HDEV) is capable of providing a power supply for operating the active device (AUD) via the first line (LM); and, when operating in the call mode, to couple the power input of the active device (AUD) to the first line (LM) and the data input of the active device (AUD) to a third line of the data cable (4PAC) when operating in the call mode; and to couple the microphone (MIC) to the second line (LR) when operating in the call mode.

15. Accessory interface circuit (IF2) according to claim 14, configured to detect an actuation call signal from a control means (BTNS) of the accessory device (ADEV); to provide an accessory call signal depending on the actuation call signal to the host device (HDEV) via the first line (LM); to detect an uplink call signal received from the host device (HDEV) via the first line (LM) and to trigger the operation in the call mode when at least one of the uplink call signal and the actuation call signal is detected.

16. Accessory interface circuit (IF2) according to one of claims 10 to 15, configured to, in particular when operating in the power mode, detect an actuation signal from the control means (BTNS); and to provide a button signal depending on the actuation signal to the host device (HDEV) via the first line (LM).

17. Method for communication between a host device (HDEV) and an accessory device (ADEV), wherein the method comprises connecting the host device (HDEV) and the accessory device (ADEV) via a data cable (4PAC); detecting, by means of the host device (HDEV), whether the accessory device (ADEV) is compatible with a power supply via a first line (LM) of the data cable (4PAC); operating the host device (HDEV) in a power mode of operation or in a legacy mode of operation depending on the detection; providing a power supply from the host device (HDEV) to the accessory device (ADEV) via the first line (LM) when the host device (HDEV) is operated in the power mode; and coupling a legacy terminal (MICS) of the host device (HDEV) to the first line (LM) when the host device (HDEV) is operated in the legacy mode.

18. Method according to claim 17, wherein the detecting whether the accessory device (ADEV) is compatible with the power supply via the first line (LM) is based on an identification signal.

19. Method according to claim 18, further comprising detecting the identification signal being received from the accessory device (ADEV) via the first line (LM).

20. Method for communication between a host device (HDEV) and an accessory device (ADEV) with an active device (AUD), wherein the method comprises connecting the host device (HDEV) and the accessory device (ADEV) via a data cable (4PAC); detecting, by means of the accessory device (HDEV), whether the host device (HDEV) is capable of providing a power supply for operating the active device (AUD) via a first line (LM) of the data cable (4PAC); operating the accessory device (HDEV) in a power mode of operation depending on the detection; coupling a power input of the active device (AUD) to the first line (LM) when the accessory device (ADEVD) is operated in the power mode; and coupling a data input of the active device (AUD) to a second line (LR) of the data cable (4PAC) when the accessory device (ADEV) is operated in the power mode.

21. Method according to claim 20, wherein the detecting whether the host device (HDEV) is capable of providing the power supply for operating the active device (AUD) via the first line (LM) is based on an answer signal.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0040] In the following the improved concept is explained in detail with the aid of exemplary implementations by reference to the drawings. Components that are functionally identical or have an identical effect may be denoted by identical references. Identical components and/or components with identical effects may be described only with respect to the figure where they first occur; their description is not necessarily repeated in subsequent figures.

[0041] In the drawings,

[0042] FIG. 1 shows an exemplary implementation of a host interface circuit according to the improved concept operating in the legacy mode and connected to an accessory device;

[0043] FIG. 2 shows an exemplary implementation of an accessory interface circuit according to the improved concept operating in the legacy mode and connected to a host device;

[0044] FIG. 3 shows an exemplary implementation of a host interface circuit according to the improved concept operating in the legacy mode and connected to an accessory interface circuit according to the improved concept operating in the legacy mode;

[0045] FIG. 4 shows an exemplary implementation of a host interface circuit according to the improved concept operating in the power mode and connected to an accessory interface circuit according to the improved concept operating in the power mode; and

[0046] FIG. 5 shows an exemplary implementation of a host interface circuit according to the improved concept operating in the call mode and connected to an accessory interface circuit according to the improved concept operating in the call mode.

DETAILED DESCRIPTION

[0047] In all figures, a data cable 4PAC is shown, comprising a first line LM, for example a microphone line, a second line LR, for example a right audio line, a third line LL, for example a left audio line and a fourth line LG, being a ground line connected to a ground terminal. The data cable 4PAC is for example a common 4-pole audio cable, for example connected to a host device HDEV and an accessory device ADEV by means of 4-pole audio jacks, for example 3.5 mm audio jacks. Of course other 4-pole cables may be used including but not limited to audio cables with 2.5 mm jacks or 6.35 mm jacks.

[0048] In all figures, an accessory device ADEV comprising control means BTNS is shown. The control means BTNS may for example comprise buttons and/or switches for changing a volume setting and for accepting, declining and/or ending for example a telephone call.

[0049] In FIG. 1, an exemplary implementation of a host interface circuit IF1 according to the improved concept operating in the legacy mode is shown. The host interface circuit IF1 is implemented in a host device HDEV which is connected to an accessory device ADEV by means of a data cable 4PAC.

[0050] The host interface circuit IF1 is connected to the first line LM, the second line LR and the third line LL. The host interface circuit IF1 comprises a first switch S1 coupling the second line LR to a right audio amplifier AMPR of the host device HDEV. Furthermore, the host interface circuit IF1 couples the third line LL to a left audio amplifier AMPL of the host device HDEV. However, in alternative implementations, the coupling of the third line LL to the left audio amplifier AMPL is not necessarily comprised by the interface circuit IF1. The host interface circuit IF1 comprises a burst mode detector BMD and a burst mode transmitter BMT, both of which are coupled between the first line LM and a processing unit HPROC of the host device HDEV.

[0051] A power regulator PR and a first diode D1 connected to the power regulator PR are comprised by the host interface circuit IF1 but are, during the depicted legacy mode of operation, not connected to the first line LM. The power regulator PR may for example be implemented as a switching regulator or as a linear voltage regulator, in particular as a low-dropout regulator. The host interface circuit IF1 also comprises a legacy terminal MICS connected to the first line LM via a second switch S2 of the host interface circuit IF1 and a resistor Rb connected in series between the second switch S2 and the legacy terminal MICS. In the shown example, the host device HDEV further comprises a microphone voltage regulator MIC_LDO with a terminal connected between the legacy terminal MICS and the resistor Rb, an analog-digital converter ADC with a terminal connected between the resistor Rb and the second switch S2 and a microphone amplifier AMPM with a terminal connected between the resistor Rb and the second switch S2 via a capacitor C. The microphone voltage regulator MIC_LDO may for example be implemented as a linear voltage regulator, in particular as a low-dropout regulator.

[0052] The accessory device ADEV comprises a microphone MIC, in particular a passive microphone, connected to the first line LM and a control means BTNS, implemented in the shown example as three switches or buttons, connected between the microphone MIC and the first line LM. Furthermore, the accessory device ADEV comprises a right speaker SPR connected to the second line LR and a left speaker SPL connected to the third line LL. In this example, the accessory device may for example be a common headset. Consequently, it may not be compatible with a power supply via the first line LM.

[0053] It is highlighted, that the coupling of the microphone MIC to the legacy terminal MICS via the first line LM may not regarded as a power supply in the sense of the improved concept. Rather, the legacy terminal MICS and the resistor Rb provide a bias for the microphone to be operated. In fact, the resistor Rb acts as a pull-up resistor for limiting a current into the first line LM during the legacy mode. In particular, it would not be possible to power an active device, for example an active noise compensation device via the legacy terminal MICS and the resistor Rb.

[0054] After a start-up of the host device HDEV, the host interface circuit IF1 is connected as shown in FIG. 1 and therefore operates in the legacy mode of operation. The accessory device ADEV does not contain an active device that could be powered for example by the power regulator PR via the first line. Therefore, the host interface circuit IF1 stays in the legacy mode of operation. In this way the microphone MIC is connected via the first line LM to the legacy terminal MICS via the resistor Rb. The left speaker SPL and the right speaker SPR are connected via the third line LR and the second line LL, respectively, to the left audio amplifier AMPL and the right audio amplifier AMPR, respectively.

[0055] If a button of the control means BTNS is being pressed, the microphone MIC is short circuited and the analog-digital converter ADC is for example used to monitor a voltage on the first line LM. Depending on a voltage level on the first line LM, the processing unit HPROC can for example determine which button of the control means BTNS has been pressed at the side of the accessory device ADEV.

[0056] In the shown way, a host device HDEV with a host interface circuit IF1 may be used in combination with a common accessory device ADEV, for example a common headset.

[0057] FIG. 2 depicts a complementary setup, showing an exemplary implementation of an accessory interface circuit IF2 according to the improved concept implemented in an accessory device ADEV. The accessory interface circuit IF2 operates in the legacy mode and is connected to a host device HDEV via a data cable 4PAC.

[0058] Here, the host device HDEV comprises right amplifier and a left audio amplifier AMPR connected to the third line LR and the fourth line LL, respectively. The host device HDEV also comprises a legacy terminal MICS connected to the first line LM and a resistor Rb connected in series between the first line LM and the legacy terminal MICS. In the shown example, the host device HDEV further comprises a microphone voltage regulator MIC_LDO with a terminal connected between the legacy terminal MICS and the resistor Rb, an analog-digital converter ADC with a terminal connected between the resistor Rb and the first line LM and a microphone amplifier AMPM with a terminal connected between the resistor Rb and the first line LM via a capacitor C.

[0059] The accessory device ADEV comprises a microphone MIC, in particular a passive microphone, a control means BTNS, implemented in the shown example as three switches or buttons, and an active device AUD, in particular an active audio device AUD. Furthermore, the accessory device ADEV comprises a right speaker SPR and a left speaker SPL connected to the active device AUD.

[0060] The accessory interface circuit IF2 comprises a third switch S3 connecting the microphone MIC to the first line LM during the depicted legacy mode. The accessory interface circuit IF2 further comprises a second diode D2 and a voltage regulator VR connected in series and the voltage regulator VR connected to a power input of the active device AUD. In the depicted legacy mode, the second diode D2, the voltage regulator VR and the power input of the active device AUD are disconnected from the first line LM. The voltage regulator VR is an optional component, which alternative implementations may not contain.

[0061] The control means BTNS are connected to the first line via a fourth switch S4. The accessory interface circuit IF2 also comprises a control unit CTRL with a button burst mode transmitter BBMT and a call burst detector CBD connected to the first line LM and with a microcontroller MCU connected to the button burst mode transmitter BBMT and the call burst detector CBD. In the legacy mode, the microcontroller MCU is disconnected from the control means BTNS via the fourth switch S4.

[0062] A start-up burst mode transmitter SBT is comprised by the accessory interface circuit IF2 and connected to the first line LM. In alternative implementations, the start-up burst mode transmitter SBT may be comprised by the control unit CTRL, for example by the microcontroller MCU. Furthermore, the accessory interface circuit IF2 comprises a fifth switch S5 disconnecting the microphone MIC from the second line LR, a sixth switch S6 connecting a data input of the active device AUD to the second line LR, a seventh switch S7 connecting the left speaker SPL to the third line LL and an eighth switch S8 connecting the right speaker SPR to the third line LR.

[0063] As described with respect to FIG. 1, also in FIG. 2 the microphone MIC is biased by the legacy terminal MICS and the resistor Rb. After a start-up of the accessory interface device IF2, the start-up burst mode transmitter SBT may be activated and configured to generate an identification signal, for example a burst signal, at the first line LM. The identification signal may for example be generated by modulating a signal to the first line LM. In particular, the modulated signal may feature a different signal amplitude and/or frequency, for example a higher signal amplitude, than a signal that may be generated by the microphone MIC. The identification signal may for example feature a frequency in or below the kHz range, for example in a low kHz range. In particular, the identification signal may feature a frequency below 20 kHz or above 20 kHz. However, since in the shown example the host device HDEV has no means to detect the identification signal, the host device HDEV does not change its operation.

[0064] The start-up burst mode transmitter SBT may have a timeout function, that is it may be configured to stop generating the identification signal after a predefined time. Then, the switching configuration may remain as shown in FIG. 2.

[0065] In such a situation, the accessory device ADEV can be used with the host device HDEV for example on a basic level, that is for example utilizing the microphone MIC, the speakers SPR, SPL and the control means BTNS. On the other hand, the active device AUD is effectively bypassed and may not be used during the legacy mode. The seventh switch S7 and the eighth switch S8 that may achieve the bypassing may for example be implemented as mechanical switches or for example as depletion mode transistor switches that may be external to or integrated into the active device AUD.

[0066] FIG. 3, FIG. 4 and FIG. 5 show an exemplary implementation of a host interface circuit IF1 according to the improved concept implemented in a host device HDEV and connected to an accessory device ADEV containing an accessory interface circuit IF2 according to the improved concept. The host device HDEV and the host interface circuit IF1 of FIGS. 3 to 5 are identical to the host device HDEV and the host interface circuit IF1 shown in FIG. 1. The accessory device ADEV and the accessory interface circuit IF2 of FIGS. 3 to 5 are identical to the accessory device ADEV and the accessory interface circuit IF2 shown in FIG. 2.

[0067] The host interface circuit IF1 and the accessory interface circuit IF2 are operating in the legacy mode in FIG. 3, in the power mode in FIG. 4 and in the call mode in FIG. 5.

[0068] After a start-up, the host interface circuit IF1 and the accessory interface circuit IF2 are operating in the legacy mode as shown in FIG. 3. The switching configuration of the host interface circuit IF1 is as described with respect to FIG. 1, the switching configuration of the accessory interface circuit IF2 is as described with respect to FIG. 2. After the start-up, the start-up burst mode transmitter SBT may be activated and configured to generate an identification signal, for example a burst signal, at the first line LM. The identification signal may for example be generated by modulating a signal to the first line LM, for example superimposed to a signal that may be generated by the microphone MIC. In particular, the modulated signal may feature a different signal amplitude and/or frequency, for example a higher signal amplitude, than the signal that may be generated by the microphone MIC. This may for example be carried out with an impedance in the order of kΩ, for example ˜2 kΩ, to the bias voltage of the legacy terminal MICS.

[0069] The burst mode detector BMD of the host interface circuit IF1 may detect the identification signal, for example by means of detecting the different signal amplitude and/or frequency. In this way, the host interface circuit IF1 may determine that the accessory device ADEV is compatible with a power supply via the first line LM, in particular via the power regulator PR. As a response to this determination, the burst mode detector BMD and/or the processing unit HPROC may switch the second switch S2 to disconnect the microphone amplifier AMPM from and connect the power regulator PR via the first diode D1 to the first line LM.

[0070] Accordingly, the start-up burst mode transmitter SBT may detect an answer signal, that is for example a change of an impedance on the first line LM due to the switching of the second switch S2. As a result the start-up burst mode transmitter SBT may stop generating the identification signal and for example controls the third switch S3 to disconnect the microphone MIC from and connect the power input of the active device AUD via the second diode and the voltage regulator VR to the first line LM. The voltage regulator VR may for example adjust a voltage level for powering the active device AUD.

[0071] Furthermore, the fourth switch S4 may be controlled by the start-up burst mode transmitter SBT to disconnect the direct connection between the control means BTNS and the first line LM and to connect the control means BTNS to the control unit CTRL, for example to the microcontroller MCU or, in alternative implementations, to a further programmable logic circuit of the control unit CTRL. Alternatively. The fourth switch S4 may be controlled by the control unit CTRL. The seventh switch S7 and the eighth switch S8 are opened for example by the microcontroller MCU in order to disconnect the direct connections of the right speaker SPR to the third line LR and the left speaker SPL to the fourth line LL. The speakers LR, LL may then be operated via the active device AUD, that is for example via the data input of the active device AUD connected to the third line LR and a further data input of the active device AUD connected to the fourth line LL.

[0072] The resulting switch configuration corresponding to the power mode is shown in FIG. 4. With this configuration the active device AUD may now be powered, that is supplied with power via the first line LM and the power regulator PR. In the power mode the first line LM may act as a power supply line for example featuring a low impedance, for example a low output impedance. Consequently, the control means BTNS may for example not be directly connected to the first line LM for example for controlling a volume or a phone call. Due to the connection of the control means BTNS to the control unit CTRL, the control unit CTRL may detect an actuation, for example a pushing, of a component of the control means BTNS.

[0073] When an actuation of the control means BTNS occurs, the control means BTNS may effectively generate an actuation signal for example by means of changing a voltage level or an impedance on the connection between the control means BTNS and the control unit CTRL. The actuation signal may then be detected, in the shown example, by the microcontroller MCU or the further programmable logic circuit. As a response, the button burst mode transmitter BBMT may generate a button signal depending on the actuation signal on the first line LM for example by modulating a signal on the first line LM. To this end, the first diode D1, the second diode D2 and/or another suitable component may affect, for example increase, an impedance on the first line LM to increase a frequency range of the button burst mode transmitter BBMT.

[0074] For example depending on a current consumption of the accessory device ADEV, in particular the active device AUD, an impedance of the diodes D1, D2 may change and allow for the modulation of the signal on the first line LM by the button burst mode transmitter BBMT. The button signal, that is the modulation of the signal on the first line LM by the button burst mode transmitter BBMT, may be detected by the burst mode detector BMD of the host interface circuit IF1. Based on the detection of the button signal, the burst mode detector BMD may communicate with the processing unit HPROC, in particular supplying information about which component of the control means BTNS has been actuated, how long it has been actuated or the like.

[0075] For example in implementations where the host device HDEV is a mobile communications device, the call mode of operation may be activated for example when a phone call arrives at the host device HDEV or when the user initiates a phone call or a spoken command while the interface circuits IF1, IF2 are operating in the power mode. In such a case, a user may for example press a call button of the control means BTNS to accept or initiate the phone call or to initiate the spoken command. As described above, this results in the control means generating an actuation signal which is in the case of the call button being pressed an actuation call signal. As explained above for the actuation signal and the button signal, the actuation call signal may then be detected for example by the microcontroller MCU or the further programmable logic circuit. As a response, the button burst mode transmitter BBMT may generate an accessory call signal depending on the actuation call signal on the first line LM for example by modulating a signal on the first line LM.

[0076] Furthermore, depending on the detection of the actuation call signal, the microcontroller MCU may switch the sixth switch S6 to disconnect the data input of the active device AUD from the second line LR and connect it, together with the further data input of the active device AUD, to the fourth line LL. For example if during power mode the third line LR is used for transmitting a right audio signal and the fourth line LL is used for transmitting a left audio signal, the switching of the sixth switch S6 effectively results in a single channel or monophonic audio operation of the active device AUD.

[0077] Depending on the actuation call signal, the microcontroller MCU may also close the fifth switch S5 to connect the microphone MIC to the second line LR, which is now available for microphone signals due to the disconnection of the data input of the active device AUD from the second line LR.

[0078] On the side of the host device HDEV, the accessory call signal may then be detected by the burst mode detector BMD which transfers the information about the user having accepted the phone call to the processing unit HPROC. Consequently, the first switch S1 may be switched by the processing unit HPROC and/or the burst mode transmitter to disconnect the left audio amplifier AMPL from the third line LR and connect the legacy terminal MICS and the microphone amplifier AMPM to the third line LR.

[0079] The resulting switching configuration of the call mode is shown in FIG. 5.

[0080] Alternatively, the call mode may also be activated by the user accepting the phone call or initiating a phone call or initiating a spoken command directly at the host device HDEV instead of pressing a button of the control means BTNS. In such a case, the processing unit HPROC may send a host call signal to the burst mode transmitter BMT which in turn generates an uplink call signal at the first line LM depending on the host call signal. The uplink call signal may then be detected by the call burst detector CBD and the switching of the fifth switch S5 and the sixth switch S6 may be carried out by the microcontroller MCU depending on the uplink call signal instead of depending on the actuation call signal as described above.

[0081] The call mode may for example be ended and the power mode be activated when for example the phone call ends. The ending of the phone call may for example be accompanied by an attenuation of the call button or another component of the control means BTNS. The changing of the switching configurations may then be carried out analogously to when entering the call mode as a response of the user accepting the phone call by pressing the call button, as described above. Alternatively or additionally, the processing unit HPROC may generate a signal indicating to the interface circuits IF1, IF2 to enter the power mode again. This may be carried out analogously to when the phone call is accepted directly at the host device HDEV, as described above.

[0082] By means of the improved concept, in particular by means of a host interface circuit, an accessory interface circuit, a communication system and/or a method according to the improved concept, communication between an accessory device and a host device may be achieved. Therein a host interface circuit may operate in the legacy mode when connected to an accessory device that is or is not compatible with a power supply via a data cable, in particular via a 4-pole audio cable.

[0083] Analogously, an accessory interface circuit according to the improved concept may operate in the legacy mode when connected to a host device that is or is not capable of supplying a power for the active device via the first line.

[0084] When a host device comprising a host interface circuit according to the improved concept is connected to an accessory interface circuit according to the improved concept, the host interface circuit and the accessory interface circuit may operate in the power mode and/or in the call mode, depending on the specific implementation of the host device and the accessory device. In the power mode, an active device, implemented in the accessory device may be supplied with power via the first line of the data cable.

[0085] In the call mode, the active device may still be powered via the first line. In case of an active audio device, a playback mode may be changed from stereophonic to monophonic playback during the call mode. In this way, the released audio line may be used for the transfer of microphone data.

[0086] One example for the accessory device is a headphone with an active noise cancelling device as an active device. However, in principle any kind of active device may be powered via the first line in the described way. In alternative implementations, the active device may be a sensor to be powered via the first line. In such an implementation, the accessory may or may not comprise a passive device such as the microphone in the described implementations. In implementations without a microphone, the skilled reader straight forwardly may adapt the described implementations accordingly. In particular, the accessory device may not be operated in the legacy mode in such a case.

[0087] In other implementations, for example in such implementations where the accessory device does not comprise a microphone, the data cable may also be implemented as a 3-pole data cable, for example a 3-pole audio cable. Corresponding implementations of the interface circuits, the communication system and the method follow readily from a corresponding adaption.