SEMICONDUCTOR ELEMENT AND MANUFACTURING METHOD THEREOF
20170287881 · 2017-10-05
Inventors
Cpc classification
H01L2225/06555
ELECTRICITY
International classification
H01L25/075
ELECTRICITY
H01L33/62
ELECTRICITY
Abstract
A semiconductor element and a manufacturing method thereof are provided. The semiconductor element includes a substrate and multiple semiconductor chips disposed thereon. The semiconductor chips are arranged to form multiple sequentially nested circle(s), and a circumference of each of which is arranged with multiple the semiconductor chips. The numbers of the semiconductor chips arranged on the respective circumferences of the sequentially nested circle(s) from inside to outside are gradually increased, and distances among the circumferences are gradually decreased from inside to outside. The disclosure optimizes the arrangement of the semiconductor chips to make the arrangement of the semiconductor chips be loose in the central region while more dense towards outside, which is in favor of uniform heat distribution and therefore can slow down aging and failure of the semiconductor chips and improve heat dissipation performance and light emitting effect of product.
Claims
1. A semiconductor element comprising a substrate and a plurality of semiconductor chips disposed on the substrate; wherein the plurality of semiconductor chips are arranged to form a plurality of sequentially nested circle(s), and the circumference of each of the circle(s) is arranged with a plurality of the semiconductor chips thereon; numbers of the semiconductor chips arranged on the respective circumferences of the plurality of sequentially nested circle(s) from inside to outside are gradually increased, and distances of every adjacent two of the circumferences of the plurality of sequentially nested circle(s) from inside to outside are gradually decreased.
2. The semiconductor element according to claim 1, wherein the center of the circle(s) is arranged with the semiconductor chip, and on any one connecting line from the center to the outmost circumference, distances from the circumferences of the plurality of sequentially nested circle(s) to the center satisfy a relationship that: R.sub.1≧(R.sub.2−R.sub.1)≧(R.sub.3−R.sub.2)≧ . . . ≧(R.sub.N−R.sub.N−1)>b; where R.sub.1, R.sub.2, R.sub.3, . . . , R.sub.N−1 and R.sub.N are the distances from the circumferences of the plurality of sequentially nested circle(s) to the center on the connecting line respectively, wherein b is a width of the plurality of semiconductor chips and a length of the plurality of semiconductor chips is larger than or equal to b, wherein N is a natural number and a value of N depends on the total amount of the plurality of semiconductor chips.
3. The semiconductor element according to claim 1, wherein the center of the circle(s) does not be arranged with the semiconductor chip, and on any one connecting line from the center to the outmost circumference, distances from the respective circumferences of the plurality of sequentially nested circle(s) to the center satisfy a relationship that: 2 R.sub.1≧(R.sub.2−R.sub.1)≧(R.sub.3−R.sub.2)≧ . . . ≧(R.sub.N−R.sub.N−1)>b; where R.sub.1, R.sub.2, R.sub.3, . . . , R.sub.N−1 and R.sub.N respectively are the distances from the respective circumferences of the plurality of sequentially nested circle(s) to the center on the connecting line, wherein b is a width of the plurality of semiconductor chips and a length of the plurality of semiconductor chips is larger than or equal to b, wherein N is a natural number and a value of N depends on the total amount of the plurality of semiconductor chips.
4. The semiconductor element according to claim 1, wherein a minimum radian between two adjacent semiconductor chips on an Nth circumference from inside to outside is c, and a minimum radian between two adjacent semiconductor chips on an (N−1)th circumference from inside to outside is d, and c and d satisfy that: d≧c.
5. The semiconductor element according to claim 1, wherein heat dissipation spaces of respective semiconductor chips on any one connecting line from a center of the circle(s) to the outmost circumference along a direction from inside to outside are gradually decreased; wherein the heat dissipation space of a semiconductor is defined as a circular region with the geometrical center of the chip as the center and the minimum one of the distances of the center to an adjacent chip and to the edge of the die bonding region as the radius.
6. The semiconductor element according to claim 1, wherein the substrate is a mirror aluminum substrate or a ceramic substrate.
7. The semiconductor element according to claim 1, wherein the semiconductor chips are light-emitting diode chips.
8. A manufacturing method of a semiconductor element, wherein it comprises steps: setting a target circular region on a substrate according to a radius of a die bonding region; placing predetermined number of semiconductor chips in the target circular region on the substrate in a form of equidistant arrangement; according to left and right remaining spaces of each row of semiconductor chips in the target circular region, increasing spaces on the row direction among semiconductor chips in the row of the semiconductor chips, wherein increased proportions of the spaces for the semiconductor chips are decreased along directions towards two ends of the row; according to upper and lower remaining spaces in the target circular region, increasing spaces on the column direction between semiconductor chips in each two adjacent rows of semiconductor chips, increased proportions of the spaces for the semiconductor chips are decreased along directions towards two ends of the two adjacent rows; and according to a rule that heat dissipation spaces of respective semiconductor chips in the predetermined number of semiconductor chips are gradually decreased from a center to an outmost circumference, slightly adjusting positions of the predetermined number of semiconductor chips, wherein the heat dissipation space of each the semiconductor chip is defined as a circular region with a center of the semiconductor chip as a center and the minimum one of distances from the center to an adjacent semiconductor chip and to an edge of the die bonding region as a radius.
9. The manufacturing method of a semiconductor element according to claim 8, wherein the substrate is a mirror aluminum substrate or a ceramic substrate.
10. The manufacturing method of a semiconductor element according to claim 8, wherein the semiconductor chips are light-emitting diode chips.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0018] In the following, with reference to accompanying drawings, concrete embodiments of the disclosure will be described in detail.
[0019]
[0020]
[0021]
[0022]
[0023]
DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS
[0024] Embodiments of the disclosure are described in detail with reference to the accompanying drawings as follows to better understand the previously mentioned objectives, features and advantages of the disclosure.
[0025] Embodiments of the disclosure below will provide an optimized circular arrangement, which can improve heat dissipation property and light-emitting effect of product thoroughly. It should be noted that “circular arrangement” of the embodiments of the disclosure below indicates more than an ideal circular arrangement, other approximate circular arrangements can be included as well, such as an ellipse or other irregular circles arrangements, but centers of various approximate circles are the same point (i.e., concentric circles) or the centers have little deviation thereamong. And “circular(s)” of the embodiments of the disclosure below indicated an ideal circular and other approximate circulars, too. Herein, it should be understood that the ideal circle has a single radius, while the approximate circle has multiple (i.e., more than one) different radii.
[0026] To be more specific, with regard to a circular arrangement provided by an embodiment of the disclosure, a plurality of semiconductor chips such as light-emitting diode chips are arranged on a substrate such as a mirror aluminum substrate or a ceramic substrate to form a plurality of nested circle(s) and/or approximate circle(s) in sequence, i.e., centers of the circle(s) are located in the innermost circle or approximate circle, on any connecting line from the center to an outmost circumference, distances from circumferences of the circle(s) to the center satisfy a certain relationship, by using the relationship to arrange the semiconductor chips, efficiency of design can be improved and an optimized circular arrangement can be found rapidly.
[0027] The relationship is primarily divided into two situations as follows.
[0028] (1) The center is disposed with a chip.
[0029] Variables a and b are defined to represent a length and a width of a chip, and alp, R.sub.1, R.sub.2, R.sub.3, . . . , R.sub.N−1 and R.sub.N respectively indicate distances from the circumferences of respective circle(s) to the center O on a same connecting line from the center O to the outmost circumference (see
b/R.sub.1<(R.sub.2−R.sub.1)/R.sub.1≦
b/(R.sub.2−R.sub.1)<(R.sub.331 R.sub.2)/(R.sub.2−R.sub.1)≦1
b/(R.sub.N−1−R.sub.N−2)<(R.sub.N−R.sub.N−1)/(R.sub.N−1−R.sub.N−2)≦1.
[0030] Furthermore, the numbers of chips on respective circumferences of the circles or approximate circles from inside to outside are gradually increased, which means arrangement densities of chips correspondingly are increased. It is assumed that a minimum radian between two adjacent chips on a circumference of the Nth circle or approximate circle numbered from inside to outside is c, and a minimum radian between two adjacent chips on a circumference of the (N−1)th circle or approximate circle is d, then c and d satisfy that: d≧c. It can be understood that if chips on a same circumference are equidistantly arranged along the circumferential direction, c and d satisfy that d>c.
[0031] (2) The center does not be disposed with chip.
[0032] Variables a and b are defined to represent a length and a width of a chip, and a≧b, R.sub.1, R.sub.2, R.sub.3, . . . , R.sub.N−1 and R.sub.N respectively indicate distances from circumferences of respective circle(s) to the center O on a same connecting line from the center O to the outmost circumference (still referring to
b/2R.sub.1<(R.sub.2−R.sub.1)/2R.sub.1≦1
b/(R.sub.2−R.sub.1)<(R.sub.3−R.sub.2)/(R.sub.2−R.sub.1)≦1
b/(R.sub.N−1−R.sub.N−2)<(R.sub.N−R.sub.N−1)/(R.sub.N−1−R.sub.N−2)≦1.
[0033] Moreover, the numbers of chips on respective circumferences of the circles or approximate circles from inside to outside are gradually increased, which means arrangement densities of chips correspondingly are increased. If a minimum radian between two adjacent chips on a circumference of the Nth circle or approximate circle numbered from inside to outside is assumed to be c, and a minimum radian between two adjacent chips on a circumference of the (N−1)th circle or approximate circle is assumed to be d, c and d satisfy that: d≧c. It can be understood that if chips on a same circumference are equidistant arrangement on the circumferential direction, c and d satisfy that d>c.
[0034] Moreover, referring to
[0035] It can be learned from above that, a heat dissipation optimization principle of the circular arrangement provided by the embodiments of the disclosure is that the numbers of chips on respective circumferences from inside to outside increase gradually, and densities of chips on respective circumferences from inside to outside gradually increase correspondingly, which would cause the chip arrangement is loose in the center and more dense towards outside. In general, heat of chips in the central region is primarily dissipated through the substrate at the bottom, chips in the peripheral region further can be dissipated towards the edges, which would lead to a circumstance of high temperature in the central region and low temperature on edges, chips in the central region are aging and failed rapidly due to the high temperature, the service period of the entire product is reduced. The chip arrangement of being loose in central region while more dense towards outside according to the embodiment can optimize the situation, so that heat can be distributed evenly.
[0036] A method for realizing a multiple chips circular arrangement shown in
[0037] It is supposed that a packaging substrate adopts COB mirror aluminum, a radius R of a circular die bonding region of the mirror aluminum substrate is 4.75 millimeters (mm), a size of the chip is 26 mil*30 mil, and the number of the chips is 24.
[0038] 1) a target circular region is obtained by using the center of the mirror aluminum substrate (rectangular region in
[0039] 2) all the chips are arranged to be equidistant and disposed in the target circular region, as shown on the left side of
[0040] 3) spaces in a row direction (horizontal direction) among the chips in each row are increased according to left and right remaining spaces of the row in the target circular region, and increased proportions are decreased from middle to two sides (i.e., the farther the chip away from the vertical axis, the smaller the increased proportion of the space in the row direction is).
[0041] 4) spaces in a column direction (vertical direction) between chips in each two adjacent rows are increased according to upper and lower remaining spaces of the target circular region, and increased proportions are smaller towards the two sides (i.e., the farther the chip away from the vertical axis, the smaller the increased proportion of the space in the column direction is).
[0042] 5) the circular arrangement provided by the embodiment of the disclosure can be preliminarily obtained according to the previous steps, and finally according to a method of drawing circles as the heat dissipation spaces shown in
[0043] Of course, it can be understood that the circular arrangement of the multiple chips shown in
[0044] To be more specific, in
[0045] Finally, in order to make the skilled in the art more clearly understand the circular arrangement rule of multiple chips of the disclosure, much more examples associated with different circular arrangements of multiple chips will be listed as follows, such as shown in
[0046] In summary, each of the embodiments of the disclosure optimizes the arrangement of the semiconductor chips such as light-emitting diode chips to make the arrangement the semiconductor chips be loose in the central region while more dense towards outside, which is in favor of uniform heat distribution and thus can slow down aging and failure of the semiconductor chips as well as improve heat dissipation property and light-emitting effect of product.
[0047] The above description illustrates preferred embodiments of the disclosure rather than any limitation, though the preferred embodiments are disclosed previously, the disclosure needs not be limited to the disclosed embodiments. For those skilled persons in the art, various modifications and variations can be made according to the concept of the disclosure. It is intended to cover various modifications and similar arrangements included within the spirit and scope of the appended claims that are to be accorded with the broadest interpretation so as to encompass all such modifications and similar structures.