Patterning of Graphene Circuits on Flexible Substrates
20170290167 · 2017-10-05
Inventors
Cpc classification
G06F3/041
PHYSICS
H05K3/025
ELECTRICITY
H05K2201/0145
ELECTRICITY
H05K2203/0152
ELECTRICITY
H05K2201/042
ELECTRICITY
G06F2203/04102
PHYSICS
H05K1/0278
ELECTRICITY
H05K3/027
ELECTRICITY
H05K2203/095
ELECTRICITY
G06F2203/04103
PHYSICS
H05K1/09
ELECTRICITY
International classification
H05K3/00
ELECTRICITY
H05K1/09
ELECTRICITY
Abstract
A process for forming a graphene circuit pattern on an object is described. A graphene layer is grown on a metal foil. A bonding layer is formed on a protective film and a surface of the bonding layer is roughened. The graphene layer is transferred onto the roughened surface of the bonding layer. The protective film is removed and the bonding layer is laminated to a first core dielectric substrate. The metal foil is etched away. Thereafter the graphene layer is etched using oxygen plasma etching to form graphene circuits on the first core dielectric substrate. The first core dielectric substrate having graphene circuits thereon is bonded together with a second core dielectric substrate wherein the graphene circuits are on a side facing the second core dielectric substrate wherein an air gap is left therebetween.
Claims
1. A graphene circuit board comprising: two core dielectric substrates having graphene patterns thereon wherein said two substrates are bonded together wherein an air gap is formed therebetween.
2. The graphene circuit board according to claim 1 wherein said two substrates each have graphene patterns on the sides facing each other.
3. The graphene circuit board according to claim 1 wherein a first of said two substrates has graphene patterns on the side facing the other substrate and wherein a second of said two substrates has a conductive layer on a side facing said first substrate.
4. The graphene circuit board according to claim 3 wherein said conductive layer comprises Copper, Gold, TiW, Silver, Palladium, or Aluminum.
5. The graphene circuit board according to claim 1 wherein said graphene patterns are electrodes or electrolytes.
6. The graphene circuit board according to claim 1 wherein said core dielectric substrates comprise Polyimide (PI), Liquid Crystal Polymer (LCP), polyester (PET), polyethylene-naphthalate (PEN), laminates of epoxies or Bismaleimide-Triazine resin (BT), Teflon, modified Teflon, ceramic, or Cyclo-olefin Polymers (COP).
7. The graphene circuit board according to claim 1 wherein at least one of said core dielectric substrates further comprises one or more conductive metal layers on a side of said substrate opposite to said side having said graphene patterns thereon, wherein said conductive metal layers comprise copper (Cu), Silver (Ag), Palladium (Pd), Aluminium (Al), Titanium-Tungsten (TiW), and/or Gold (Au).
8. The graphene circuit board according to claim 1 wherein each of said core dielectric substrates has a thickness of between about 2 and 200 μm and wherein said graphene patterns have a thickness of between about 0.3 and 3 nm.
9. The graphene circuit board according to claim 1 further comprising a bonding layer between said graphene patterns and said first core dielectric layer wherein said bonding layer comprises a thermoset adhesive film reinforced with fibers.
10. The graphene circuit board according to claim 9 wherein a surface of said bonding layer facing said graphene patterns has a roughened surface.
11. The graphene circuit board according to claim 1 wherein said two substrates are bonded together with pressure-sensitive adhesive, thermal-sensitive adhesive, conductive epoxy, or non-conductive epoxy.
12. The graphene circuit board according to claim 1 wherein said graphene circuit board is used in wearable electronic devices, fingerprint sensors, flexible displays, or touch screen panels.
13. A method for forming a graphene circuit board comprising: growing a graphene layer on a metal foil; laminating a bonding film onto a first core dielectric substrate; roughening a surface of said bonding film; transferring said graphene layer onto roughened said surface of said bonding film; thereafter etching away said metal foil; thereafter oxygen plasma etching said graphene layer to form graphene circuits on said first core dielectric substrate; and thereafter bonding together said first core dielectric substrate having said graphene circuits thereon with a second core dielectric substrate wherein said graphene circuits are on a side facing said second core dielectric substrate and wherein an air gap is left therebetween.
14. The method according to claim 13 wherein said bonding film comprises a thermoset adhesive film reinforced with fibers.
15. The method according to claim 13 wherein said roughening said surface of said bonding film comprises treating said surface with potassium permanganate.
16. The method according to claim 13 wherein said second core dielectric substrate has graphene patterns formed thereon facing said first core dielectric substrate.
17. The method according to claim 13 said second core dielectric substrate has a conductive layer on a side facing said first core dielectric substrate wherein said conductive layer comprises Copper, Gold, TiW, Silver, Palladium, or Aluminum.
18. The method according to claim 13 wherein said graphene patterns are electrodes or electrolytes.
19. The method according to claim 13 wherein said first and second core dielectric substrates comprise Polyimide (PI), Liquid Crystal Polymer (LCP), polyester (PET), polyethylene-naphthalate (PEN), laminates of epoxies or Bismaleimide-Triazine resin (BT), Teflon, modified Teflon, ceramic, or Cyclo-olefin Polymers (COP).
20. The method according to claim 13 wherein at least one of said first and second core dielectric substrates further comprises one or more conductive metal layers on a side of said substrate opposite to said side having said graphene patterns thereon, wherein said conductive metal layers comprise copper (Cu), Silver (Ag), Palladium (Pd), Aluminium (Al), Titanium-Tungsten (TiW), and/or Gold (Au).
21. The method according to claim 13 wherein each of said first and second core dielectric substrates has a thickness of between about 2 and 200 μm and wherein said graphene patterns have a thickness of between about 0.3 and 3 nm.
22. The method according to claim 13 wherein said bonding of said first and second core substrates uses pressure-sensitive adhesive, thermal-sensitive adhesive, conductive epoxy, or non-conductive epoxy.
23. A method for forming a graphene circuit board comprising: growing a graphene layer on a metal foil; forming a bonding layer on a protective film and roughening a surface of said bonding layer; transferring said graphene layer onto roughened said surface of said bonding layer; thereafter removing said protective film and laminating said bonding layer to a first core dielectric substrate; thereafter etching away said metal foil; thereafter oxygen plasma etching said graphene layer to form graphene circuits on said first core dielectric substrate; and thereafter bonding together said first core dielectric substrate having said graphene circuits thereon with a second core dielectric substrate wherein said graphene circuits are on a side facing said second core dielectric substrate and wherein an air gap is left therebetween.
24. The method according to claim 23 wherein said bonding layer comprises a thermoset adhesive film reinforced with fibers.
25. The method according to claim 23 wherein said roughening said surface of said bonding film comprises treating said surface with potassium permanganate.
26. The method according to claim 23 wherein said second core dielectric substrate has graphene patterns formed thereon facing said first core dielectric substrate.
27. The method according to claim 23 said second core dielectric substrate has a conductive layer on a side facing said first core dielectric substrate wherein said conductive layer comprises Copper, Gold, TiW, Silver, Palladium, or Aluminum.
28. The method according to claim 23 wherein said graphene patterns are electrodes or electrolytes.
29. The method according to claim 23 wherein said first and second core dielectric substrates comprise Polyimide (PI), Liquid Crystal Polymer (LCP), polyester (PET), polyethylene-naphthalate (PEN), laminates of epoxies or Bismaleimide-Triazine resin (BT), Teflon, modified Teflon, ceramic, or Cyclo-olefin Polymers (COP).
30. The method according to claim 23 wherein at least one of said first and second core dielectric substrates further comprises one or more conductive metal layers on a side of said substrate opposite to said side having said graphene patterns thereon, wherein said conductive metal layers comprise copper (Cu), Silver (Ag), Palladium (Pd), Aluminium (Al), Titanium-Tungsten (TiW), and/or Gold (Au).
31. The method according to claim 23 wherein each of said first and second core dielectric substrates has a thickness of between about 2 and 200 μm and wherein said graphene patterns have a thickness of between about 0.3 and 3 nm.
32. The method according to claim 23 wherein said bonding of said first and second core substrates uses pressure-sensitive adhesive, thermal-sensitive adhesive, conductive epoxy, or non-conductive epoxy.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0010] In the accompanying drawings forming a material part of this description, there is shown:
[0011]
[0012]
[0013]
[0014]
[0015]
[0016]
DETAILED DESCRIPTION
[0017] The present disclosure aims to overcome the shortcomings of the existing flexible printed circuit board to provide a new graphene circuit board with improved electrical conductivity, thermal conductivity and chemical resistance. The graphene pattern or circuit can be embedded within the substrate with an air gap to provide electrical connections. It also offers excellent flexibility by reduction in overall thickness for use in the coming wearable electronics devices, fingerprint sensors, flexible displays, and touch screen panels.
[0018] Two preferred embodiments of the present disclosure are described with respect to
[0019] The target substrate 20, shown in
[0020] Also shown is a base layer 12 such as polyester (PET) on which is formed the bonding film 10. The bonding film 10 can be any kind of thermoset adhesive film reinforced with fibers, such as epoxy, cyanide ester, acrylic adhesive, etc. The fibers can be glassy fiber, or aramide paper, etc. The adhesive film will have a low coefficient of thermal expansion (CTE) of less than about 46 and a high glass transition temperature (Tg) of more than about 200 degrees C.
[0021] One of the bonding film candidates is ABF (Ajinomoto Bonding Film), an epoxy resin-based adhesive film consisting of: [0022] Bisphenol A epoxy resin: 9 wt. % [0023] Petroleum naphtha: under 5.0 wt. % [0024] Cyclohexanone: 1.1 wt. % [0025] N,N-dimethylformamide: 0.5 wt. % [0026] Toluene: under 5.0 wt. % [0027] Ethanol: under 5.0 wt. % [0028] Methyl ethyl ketone: under 5.0 wt. % [0029] Silica powder: 30˜40 wt. %
[0030] Another bonding film candidate is Dupont FR0100 bonding film made of modified acrylic: [0031] N,N′-ethylenebis:>=10−<20% [0032] Antimoney trioxide:>=1−<10%
[0033] Phenol:>=0, 1 −<0, 25%
[0034] Other possibilities are Katpon/Acrylic, LCP, or unreacted thermal cure resin.
[0035] As shown in
[0036] Now, as shown in
[0037] Also shown in
[0038] Next, the roughened bonding film 10 is laminated onto the graphene/metal surface by a hot press process, as shown in
[0039] Referring now to
[0040] Now, oxygen plasma etching is performed to form graphene circuits in the transferred graphene. Etching the graphene after it has been transferred to the substrate provides better fine line width definition and spacing than if the etching were performed prior to transfer; also better alignment accuracy can be achieved with the support of fiducial marks.
[0041] First, a dry film or photo-resist 25 is applied on the graphene surface to provide a protection for the desired graphene from plasma etching as shown in
[0042] Preferably, plasma etching is conducted by a reel to reel format oxygen plasma etching machine. When the graphene pattern is formed at high density on top of a bonding film of the target substrate in a reel to reel process, the pitch can be reduced to 15 μm with 7.5 μm line and 7.5 μm spacing. The patterned graphene 22 is shown in FIG. 1H. More preferably, after etching, the dry film or photo-resist is removed from the patterned graphene layer, as shown in
[0043] Referring now more particularly to
[0044]
[0045] Now, as shown in
[0046] Also shown in
[0047] As shown in
[0048]
[0049] The PET film 12 is peeled off, and then the substrate 20 and the bonding film 10 are laminated together, as shown in
[0050] Referring now to
[0051] Now, oxygen plasma etching is performed to form graphene circuits in the transferred graphene. Etching the graphene after it has been transferred to the substrate provides better fine line width definition and spacing than if the etching were performed prior to transfer; also better alignment accuracy can be achieved with the support of fiducial marks.
[0052] First, a dry film or photo-resist 25 is applied on the graphene surface to provide a protection for the desired graphene from plasma etching as shown in
[0053] Preferably, plasma etching is conducted by a reel to reel format oxygen plasma etching machine. The patterned graphene 22 is shown in
[0054]
[0055]
[0056] In
[0057] The core dielectric substrate 20 may further be laminated with one or more conductive metal layers on a side of the substrate opposite to the graphene patterned side. These metal layers may comprise copper (Cu), Silver (Ag), Palladium (Pd), Aluminium (Al), Titanium-Tungsten (TiW), and/or Gold (Au).
[0058] Now, the graphene substrate can be used in a variety of applications, such as for wearable electronic devices, fingerprint sensors, flexible displays, and touch screen panels. For example, two core dielectric substrates 20 and 21 with graphene patterns 22 and 24, respectively, can be bonded with the graphene sides facing each other, as shown in
[0059]
[0060] The circuit board of the present disclosure provides improved electrical and thermal conductivity and chemical resistance. Graphene has excellent properties in many aspects including: better electrical conductivity than silver and improved thermal conductivity over copper. It has been found in one experiment that graphene's thermal conductivity goes to roughly 5300 watts/degree Kelvin, while copper's thermal conductivity is approximately 390 watts/degree Kelvin. Furthermore, graphene offers very good chemical resistance compared to materials commonly used in the flexible substrate field.
[0061] While an air gap cannot provide electrical connection, when a finger press is applied on an application of the graphene circuits with air gap, the air gap will be closed by the finger press and electrical connection will be realized through contact of surface 22 with surface 24 or 26. The graphene on a flexible substrate provides excellent flexibility and durability due to its thinner profile than the conventional circuit board. The thickness of this flexible circuit board can be thinner, down to 10 μm. It also can be bent easily and can conform well to its final shape without bounce back.
[0062] Although the preferred embodiment of the present disclosure has been illustrated, and that form has been described in detail, it will be readily understood by those skilled in the art that various modifications may be made therein without departing from the spirit of the disclosure or from the scope of the appended claims.