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Patent | Abstract |
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Microprocessor and data flow microprocessor having vector operation function
Patent number: 5666535 Assignee: Mitsubishi Denki Kabushiki Kaisha (Tokyo, JP) Inventors: Shinji Komori (Itami, JP), Hidehiro Takata (Itami, JP), Toshiyuki Tamura (Itami, JP), Fumiyasu Asai (Itami, JP), Hirono Tsubota (Itami, JP) |
A microprocessor which can execute a test and set instruction for an exclusive control by combination of a few simple instructions, and data flow microprocessor which realizes high operation performance mainly in vector operation by reading out of data to be operated, writing in operation result and executing memory access in short time period and in parallel, and whose running efficiency of program is high in multi-processor construction. |
Data flow processor with next destination node determination
Patent number: 5218706 Assignee: Mitsubishi Denki Kabushiki Kaisha (Tokyo, JP) Inventors: Shinji Komori (Itami, JP), Hirono Tsubota (Itami, JP), Kenji Shima (Amagasaki, JP) |
A data flow processor which is so constructed that the destination node number in a program memory is stored at a relative address from, for example, a stored address of the present instruction, and a storing address for the next instruction is obtained by adding the relative address of the next instruction to the address of the present instruction. Hence, an amount of data of storing address of instruction to be executed next executed and included in the respective instructions is reduced, whereby an amount of hardware at the program memory is reduced and the memory access time is contracted. |
Data flow processor with data processing and next address determination being made in parallel
Patent number: 5363491 Assignee: Mitsubishi Denki Kabushiki Kaisha (JP) Inventors: Shinji Komori (Itami, JP), Hirono Tsubota (Itami, JP), Kenji Shima (Amagasaki, JP) |
A data flow processor which is so constructed that the destination node number in a program memory is stored at a relative address from, for example, a stored address of the present instruction, and a storing address for the next instruction is obtained by adding the relative address of the next instruction to the address of the present instruction. Hence, an amount of data of storing address of instruction to be executed next and included in the respective instructions is reduced, whereby an amount of hardware at the program memory is reduced and the memory access time is contracted. |
Microprocessor and data flow microprocessor having vector operation function
Patent number: 5404553 Assignee: Mitsubishi Denki Kabushiki Kaisha (Tokyo, JP) Inventors: Shinji Komori (Itami, JP), Hidehiro Takata (Itami, JP), Toshiyuki Tamura (Itami, JP), Fumiyasu Asai (Itami, JP), Hirono Tsubota (Itami, JP) |
A microprocessor which can execute a test and set instruction for an exclusive control by combination of a few simple instructions, and data flow microprocessor which realizes high operation performance mainly in vector operation by reading out of data to be operated, writing in operation result and executing memory access in short time period and in parallel, and whose running efficiency of program is high in multi-processor construction. |
Cut detection system, shot detection system, scene detection system and cut detection method
Patent number: 8761260 Assignee: Funai Electric Co., Ltd. (Osaka, JP), The University Of Electro Communications (Tokyo, JP) Inventors: Hiroyoshi Morita (Tokyo, JP), Atsunori Sakai (Tokyo, JP), Yasuo Masaki (Osaka, JP), Hirono Tsubota (Osaka, JP) |
A cut detection system includes: an extractor configured to extract macroblock type information at least for every B frame from video compressed data including the macroblock type information; a calculator configured to calculate the number of intra-coded macroblocks for every frame from the extracted macroblock type information; and a detector configured to detect the B frame or a group of picture including the B frame to be a replay cut portion, which is a head portion or last portion of a replay shot, by using a frequency characteristic of the intra-coded macroblocks included in the B frame as determination conditions. |