A method for producing a semiconductor device includes forming a gate electrode, a source electrode, and a drain electrode on an upper surface of a semiconductor layer, forming a first insulating film on the gate electrode, and forming a field plate on the first insulating film, the field plate having a first metal layer and a second metal layer having a higher Mohs hardness than the first metal layer. The forming the field plate includes forming a resist mask having an opening, the opening exposing a portion of the first insulating film overlapping the gate electrode, forming the first metal layer and the second metal layer in this order on an upper surface of the resist mask and inside the opening, and removing the resist mask and a portion of the first and second metal layers that are disposed on the resist mask by a lift-off process.

A semiconductor device includes: a trench formed in a surface of a semiconductor substrate and extending lengthwise in a direction parallel to the surface; a body region adjoining the trench; a source region adjoining the trench above the body region; a drift region adjoining the trench below the body region; a field electrode in a lower part of the trench and separated from the substrate; and a gate electrode in an upper part of the trench and separated from the substrate and the field electrode. A first section of the field electrode is buried below the gate electrode in the trench. A second section of the field electrode transitions upward from the first section in a direction toward the surface. The separation between the second section and the gate electrode is greater than or equal to the separation between the first section and the gate electrode.

Various embodiments of the present disclosure are directed towards an integrated chip including a field plate. A gate structure overlies a substrate between a source region and a drain region. A drift region is disposed laterally between the gate structure and the drain region. A first dielectric layer overlies the substrate. A field plate is disposed within the first dielectric layer between the gate structure and the drain region. A conductive wire overlies the first dielectric layer and contacts the field plate. At least a portion of the conductive wire directly overlies a first sidewall of the drift region.

Methods and systems provided. A system may include an application program. The application program may be configured to cause one or more images captured via a remote system to be conveyed to a server via a metered connection. The application program may also be configured to enable at least one image of the one or more images conveyed to the server to be accessed via an electronic device. Further, the application program may be configured to cause a specific portion of a previously captured video associated with an image of the at least one image to be conveyed from the remote system to the server via the metered connection in response to a request.

An integrated circuit structure includes a substrate including silicon, the substrate having a top surface. A first trench is in the substrate, the first trench having a first width and a first height. A second trench is in the substrate, the second trench having a second width and a second height. The second width is greater than the first width, and the second height is greater than the first height. A first island is in the first trench, the first island including gallium and nitrogen and having first corner facets at least partially below the top surface of the substrate. A second island is in the second trench, the second island including gallium and nitrogen and having second corner facets at least partially below the top surface of the substrate.

Structures for a laterally-diffused metal-oxide-semiconductor device and methods of forming same. The structure comprises a semiconductor substrate including a trench, a source and a drain in the semiconductor substrate, a gate laterally positioned between the trench and the source, and a field plate inside the trench. The field plate is laterally positioned between the gate and the drain. The structure further comprises a gate dielectric between the gate and the semiconductor substrate. The gate dielectric includes a first section adjacent to the field plate and a second section adjacent to the source. The first section is thicker than the second section.

A nitride semiconductor device includes a first passivation layer and a first field plate electrode arranged on the first passivation layer. The first passivation layer covers an electron supply layer, a gate layer, and a gate electrode. The first field plate electrode includes a plate body and a connector, which electrically connects the plate body and the source electrode. The plate body is at least partially arranged in a region between the gate electrode and the drain electrode in plan view, and extends in a Y-axis direction that is orthogonal to an X-axis direction in plan view. The connector is located above the gate electrode and between the plate body and the source electrode, has a width in the Y-axis direction, and extends in the X-axis direction to connect the plate body and the source electrode.

The present disclosure provides a semiconductor device, including a substrate, a first active region in the substrate, a second active region in the substrate and adjacent to the first active region, an isolation region in the substrate and between the first active region and the second active region, and a dummy gate overlapping with the isolation region, wherein an entire bottom width of the dummy gate is greater than an entire top width of the isolation region.

Laterally-gated transistors and lateral Schottky diodes are disclosed. The FET includes a substrate, source and drain electrodes, channel, a gate electrode structure, and a dielectric layer. The gate electrode structure includes an electrode in contact with the channel and a lateral field plate adjacent to the electrode. The dielectric layer is disposed between the lateral field plate and the channel. The lateral field plate contacts the dielectric layer and to modulate an electric field proximal to the gate electrode proximal to the drain or source electrodes. Also disclosed is a gate electrode structure with lateral field plates symmetrically disposed relative to the gate electrode. Also disclosed in a substrate with dielectric structures buried in the substrate remote from the gate electrode structure. A lateral Schottky diode having an anode structure includes an anode (A), cathodes (C) and lateral field plates located between the anode and the cathodes.

A semiconductor device according to the present disclosure includes: a semiconductor substrate with a first main surface and a second main surface; a drift layer of a first conductivity type formed in the semiconductor substrate; a first impurity diffusion layer of a second conductivity type formed on the drift layer to be closer to the first main surface; and a buffer layer of the first conductivity type formed on the drift layer to be closer to the second main surface and higher in peak impurity concentration than the drift layer. The drift layer has a first trap, a second trap, and a third trap, whose energy level each is lower than energy at a bottom of a conduction band by 0.246 eV, 0.349 eV, and 0.470 eV. The second trap has trap density of equal to or greater than 2.010.sup.11 cm.sup.3.