An optoelectronic component may include a support and multiple optoelectronic semiconductor chips that can be actuated individually and independently of one another. Each semiconductor chip may include a semiconductor layer sequence. Each semiconductor chip may have an electrically insulating passivation layer on the respective lateral surface of the semiconductor layer sequence. The semiconductor chip(s) are assigned to a first group, which may be paired with a common boundary field generating device arranged on the passivation layer face facing away from the semiconductor layer sequence at an active zone for each semiconductor chip of the first group. The boundary field generating device is designed to at least temporarily generate an electric field in the boundary regions of the active zone so that a flow of current through the semiconductor layer sequences can be controlled in the boundary regions during the operation of the semiconductor chips of the first group.

In one embodiment of a superluminescent diode, a first diode adapted on a semiconductor die is to be forward-biased to output optical energy in response to a bias signal, and a second diode adapted on the semiconductor die is to be reverse-biased, the second diode to receive and absorb back propagating optical energy from the first diode and output a measure of the back propagating optical energy as an absorber feedback current. A comparator may be configured to compare the absorber feedback current to a reference current and output a comparison signal, and a driver control circuit coupled to the comparator may provide the bias signal based at least in part on the comparison signal. Other embodiments are described and claimed.

A back-light unit including light-emitting chips and a display apparatus are disclosed. The back-light unit includes a driving voltage line on a substrate, and a ground voltage line spaced apart from the driving voltage line. The light-emitting chips are on a lower insulating layer covering the driving voltage line and the ground voltage line. A driving chip electrically connected to the ground voltage line may be on the substrate. Each of the light-emitting chips may be electrically connected between the driving voltage line and the driving chip by emission connecting lines. A driving dummy pattern and/or a ground dummy pattern is between the light-emitting chips and the emission connecting lines. The driving dummy pattern is electrically connected to the driving voltage line, and the ground dummy pattern is electrically connected to the ground voltage line. Thus, a luminance difference of the light-emitting chips may be prevented or at least reduced.

A method for achieving voltage-controlled gate-modulated light emission using monolithic integration of fin- and nanowire- n-i-n vertical FETs with bottom-tunnel junction planar InGaN LEDs is described. This method takes advantage of the improved performance of bottom-tunnel junction LEDs over their top-tunnel junction counterparts, while allowing for strong gate control on a low-cross-sectional area fin or wire without sacrificing LED active area as in lateral integration designs. Electrical modulation of 5 orders, and an order of magnitude of optical modulation are achieved in the device.

A light source module (100) with integrated wavemeter components (460, 494, 495) for stabilizing the output power and wavelength of a superluminescent diode or other broadband semiconductor light source (121) outputting a broadband output beam. A portion of the source output beam is directed to an optical edge filter (460) with a cross-over wavelength lying within the bandwidth of the output beam. The edge filter (460) divides the light it receives into a short-wavelength component and a long-wavelength component. These two components are then directed onto respective photodetectors (494, 495) that output respective signals to a wavemeter controller. The controller adjusts the drive current and/or temperature of the source to maintain the mean wavelength of the source's output beam at a set constant value according to a control parameter determined from a combination of the photodetector signals such as their ratio or the ratio between their difference and sum.

A light-emitting device includes an epitaxial structure that includes a first semiconductor layer, an active layer and a second semiconductor layer. The light-emitting device further has a transparent current spreading unit, a first electrode and a second electrode. The transparent current spreading unit includes a first transparent current spreading layer and a second transparent current spreading layer. The first transparent current spreading layer is doped with aluminum and has a thickness that accounts for 0.5% to 33% of a thickness of the transparent current spreading unit. The second transparent current spreading layer has a thickness greater than that of the first transparent current spreading layer. A light-emitting apparatus includes a circuit control component, and a light source that is coupled to the circuit control component and that includes the aforesaid light-emitting device.

Disclosed is a semiconductor device comprising a thin film transistor and wirings connected to the thin film transistor, in which the thin film transistor has a channel formation region in an oxide semiconductor layer, and a copper metal is used for at least one of a gate electrode, a source electrode, a drain electrode, a gate wiring, a source wiring, and a drain wiring. The extremely low off current of the transistor with the oxide semiconductor layer contributes to reduction in power consumption of the semiconductor device. Additionally, the use of the copper metal allows the combination of the semiconductor device with a display element to provide a display device with high display quality and negligible defects, which results from the low electrical resistance of the wirings and electrodes formed with the copper metal.

A vertical solid state device comprising: a connection pad; and side walls comprising a metal-insulator-semiconductor (MIS) structure; wherein a gate of the MIS structure is shorted to at least one contact of the vertical solid state device and a threshold voltage (VT) of the MIS structure is adjusted to increase the efficiency of the device.

A package having a field emission element may include a handle layer; a buried layer stacked on the handle layer; a device layer stacked on the buried layer; an insulating layer stacked in an upper region of the device layer; a gate electrode stacked in an upper region of the insulating layer; and at least one light-emitting element disposed in a lower region of the device layer, and configured to emit light through the device layer. The insulating layer may be configured with a plurality of insulating regions separated by first separation regions, and the gate electrode may be configured with a plurality of metal regions separated by second separation regions. The device layer may be provided with protruding portions disposed to protrude between the first separation regions between the insulating regions and the second separation regions between the metal regions.

A device including a first portion, a second portion, a first contact and a second contact, the first portion being made of a semiconductor having a first doping, the second portion being made of a semiconductor having a second doping different than the first, the first portion and the second portion forming a p/n junction including a depletion zone in the first portion, the contacts being configured so that when an electric voltage (V1) is applied between the contacts, a dimension of the depletion zone depends on a value of the electric voltage, an ionization energy being defined for dopants of the second portion. The device includes an emitter generating a radiation having an energy greater than the ionization energy and illuminating the second portion with the radiation.