A semiconductor device with a semiconductor body is specified, the semiconductor body extending in a vertical direction between a first main surface and a second main surface opposite the first main surface. The semiconductor body comprises a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type different from the first conductivity type thereby forming a first pn junction, wherein the first semiconductor layer is more heavily doped than the second semiconductor layer. A side surface of the semiconductor body extending between the first main surface and the second main surface delimits the semiconductor body in a lateral direction comprises a first partial region and a second partial region, wherein the first partial region and the second partial region delimit the first semiconductor layer in regions.

A semiconductor device with a semiconductor body is specified, the semiconductor body extending in a vertical direction between a first main surface and a second main surface opposite the first main surface. The semiconductor body comprises a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type different from the first conductivity type thereby forming a first pn junction, wherein the first semiconductor layer is more heavily doped than the second semiconductor layer. A side surface of the semiconductor body extending between the first main surface and the second main surface delimits the semiconductor body in a lateral direction comprises a first partial region and a second partial region, wherein the first partial region and the second partial region delimit the first semiconductor layer in regions.

An electronic device includes a doped semiconductor substrate of a first conductivity type. First and second doped wells are provided, separated from each other by trench isolation, within the doped semiconductor substrate. At least one first region and at least one second region are respectively located in the first and second doped wells, with each first and second region having a doping level higher than a doping level of the first and second doped wells. The trench isolation penetrates into the first and second doped wells and extends laterally between the first region and second region. A third region laterally extends between the first and second doped wells at a location under the insulating trench. The third region has a doping level lower than the doping level of the first and second doped wells.

Structures for a silicon-controlled rectifier and methods of forming same. The structure comprises a first well, a second well, and a third well in a semiconductor substrate. The third well is positioned between the first well and the second well. A first terminal includes a first doped region in the first well, and a second terminal includes a second doped region in the second well. The first well, the second well, and the second doped region have a first conductivity type, and the third well and the first doped region have a second conductivity type opposite to the first conductivity type. The structure further comprises a third doped region in the third well. The third doped region includes a first segment and a second segment, and the first segment is separated from the second segment by a portion of the first well and a portion of the third well.

A vertical semiconductor triode includes a first layer of semiconductor material, the first layer including first and second surfaces, the first surface being in contact with a first electrode forming a Schottky contact.

A vertical semiconductor triode includes a first layer of semiconductor material, the first layer including first and second surfaces, the first surface being in contact with a first electrode forming a Schottky contact.

A memory device based on thyristors, comprises the following elements. A plurality of gate structures, are continuous structures in the first direction. A plurality of bit lines, extending in a second direction substantially perpendicular to the first direction. A plurality of source lines, extending in the first direction. A plurality of channels, extending in a third direction substantially perpendicular to the first direction and the second direction, and penetrating the gate structures. The first doped regions of the channels are coupled to the bit lines, and the second doped regions of the channels are coupled to the source lines. A plurality of memory units formed by the gate structures and corresponding channels. The source lines are arranged in sequence according to the second direction to form a stair structure, and the lengths of the source lines decrease in sequence in the first direction.

A memory device based on thyristors, comprises the following elements. A plurality of gate structures, are continuous structures in the first direction. A plurality of bit lines, extending in a second direction substantially perpendicular to the first direction. A plurality of source lines, extending in the first direction. A plurality of channels, extending in a third direction substantially perpendicular to the first direction and the second direction, and penetrating the gate structures. The first doped regions of the channels are coupled to the bit lines, and the second doped regions of the channels are coupled to the source lines. A plurality of memory units formed by the gate structures and corresponding channels. The source lines are arranged in sequence according to the second direction to form a stair structure, and the lengths of the source lines decrease in sequence in the first direction.

A light detection and ranging (LIDAR) sensor system mounted to a vehicle includes a first device and a second device coupled to the first device. The first device includes a laser source and one or more optical components. The first device is configured to output an optical signal associated with a local oscillator (LO) signal. The second device includes an optical amplifier array device and a transceiver device. The optical amplifier array device includes an integrated optical component and is configured to amplify the optical signal. The transceiver device is configured to transmit the amplified optical signal to an environment and receive a returned optical signal that is reflected from an object in the environment.

An electrostatic discharge protection device and an electrostatic discharge protection circuit are provided. The electrostatic discharge protection device includes first to fifth well regions, first to fifth P-type doped regions, and first and second N-type doped regions. The first to fifth P-type doped regions and the first and second N-type doped regions are disposed in the first to fifth well regions and the fourth and fifth well regions disposed on a deep N-type well region in a P-type semiconductor substrate. The conductivity types of the first, third and fourth well regions are P-type. The conductivity types of the second and fifth well regions are N-type. The second and fifth P-type doped regions and the second N-type doped region are electrically connected to the first power pad. The first, third and fourth P-type doped regions and the first N-type doped region are electrically connected to the second power pad.