A phase change memory, system, and method for gradually changing the conductance and resistance of the phase change memory while preventing resistance drift. The phase change memory may include a phase change material. The phase change memory may also include a bottom electrode. The phase change memory may also include a heater core proximately connected to the bottom electrode. The phase change memory may also include a set of conductive rings surrounding the heater core, where the set of conductive rings comprises one or more conductive rings, and where the set of conductive rings are proximately connected to the phase change material. The phase change memory may also include a set of spacers, where a spacer, from the set of spacers, separates a portion of a conductive ring, from the set of conductive rings, from the heater core.

According to various embodiments, there is provided a memory cell. The memory cell may include a transistor, a dielectric member, an electrode and a contact member. The dielectric member may be disposed over the transistor. The electrode may be disposed over the dielectric member. The contact member has a first end and a second end opposite to the first end. The first end is disposed towards the transistor, and the second end is disposed towards the dielectric member. The contact member has a side surface extending from the first end to the second end. The second end may have a recessed end surface that has a section that slopes towards the side surface so as to form a tip with the side surface at the second end. The dielectric member may be disposed over the second end of the contact member and may include at least a portion disposed over the tip.

The disclosed subject matter relates generally to structures, memory devices and a method of forming the same. More particularly, the present disclosure relates to resistive random-access (ReRAM) memory devices with an electrode having tapered sides. The present disclosure provides a memory device including a first electrode having a tapered shape and including a tapered side, a top surface, and a bottom surface, in which the bottom surface has a larger surface area than the top surface, a resistive layer on and conforming to at least the tapered side of the first electrode, and a second electrode laterally adjacent to the tapered side of the first electrode, the second electrode including a top surface and a side surface abutting the resistive layer, in which the side surface forms an acute angle with the top surface.

A heater, a system, and a method for linearly changing the resistance of the phase change memory through a graded heater. The system may include a phase change memory. The phase change memory may include a dielectric. The phase change memory may also include a heater patterned on the dielectric, the heater including: an outside conductive heating layer that has a higher resistance than other layers of the heater, and an inside conductive heating layer that has a lower resistance than the outside conductive heating layer, where the outside conductive heating layer is at an outside area of the heater and the inside conductive heating layer is at an inside area of the heater. The phase change memory may also include a phase change material proximately connected to the heater. The phase change memory may also include a top electrode proximately connected to the phase change material.

An ovonic threshold switch (OTS) selector and a memory device including the OTS selector is provided. The OTS selector includes a switching layer formed of a GeCTe compound further doped with one or both of nitrogen and silicon, and exhibits improved thermal stability and electrical performance.

A ring-shaped heater, system, and method to gradually change the conductance of the phase change memory through a concentric ring-shaped heater. The system may include a phase change memory. The phase change memory may include a bottom electrode. The phase change memory may also include a ring-shaped heater patterned on top of the bottom electrode, the ring-shaped heater including: a plurality of concentric conductive heating layers, and a plurality of insulator spacers, where each insulator spacer separates each conductive heating layer. The phase change memory may also include a phase change material proximately connected to the ring-shaped heater. The phase change memory may also include a top electrode proximately connected to the phase change material.

A method of forming a metal chalcogenide material. The method comprises introducing a metal precursor and a chalcogenide precursor into a chamber, and reacting the metal precursor and the chalcogenide precursor to form a metal chalcogenide material on a substrate. The metal precursor is a carboxylate of an alkali metal, an alkaline earth metal, a transition metal, a post-transition metal, or a metalloid. The chalcogenide precursor is a hydride, alkyl, or aryl precursor of sulfur, selenium, or tellurium or a silylhydride, silylalkyl, or silylaryl precursor of sulfur, selenium, or tellurium. Methods of forming a memory cell including the metal chalcogenide material are also disclosed, as are memory cells including the metal chalcogenide material.

A gas detection device includes a gas sensor and a drive circuit. The drive circuit includes a measurement circuit, a power supply circuit, and a control circuit. The gas sensor includes a first electrode, a second electrode, a metal-oxide layer disposed between the first electrode and the second electrode, and an insulating film that covers the first electrode, the second electrode, and the metal-oxide layer, and has an opening that exposes part of a main surface of the second electrode. A resistance value of the metal-oxide layer decreases when gas containing hydrogen atoms contact the second electrode. When the resistance value of the metal-oxide layer falls outside a predetermined range, the drive circuit applies a predetermined voltage between the first electrode and the second electrode to restore the resistance value of the metal-oxide layer back into the predetermined range.

An in-memory computing architecture is disclosed that can evaluate the transitive closure of graphs using the natural parallel flow of information in 3-D nanoscale crossbars. The architecture can be implemented using 3-D crossbar architectures with as few as two layers of 1-diode 1-resistor (1D1R) interconnects. The architecture avoids memory-processor bottlenecks and can hence scale to large graphs. The approach leads to a runtime complexity of O(n.sup.2) using O(n.sup.2) memristor devices. This compares favorably to conventional algorithms with a time complexity of O((n.sup.3)/p+(n.sup.2) log p) on p processors. The approach takes advantage of the dynamics of 3-D crossbars not available on 2-D crossbars.

Disclosed is a variable resistance memory device including a first conductive line extending in a first direction parallel to a top surface of the substrate, memory cells spaced apart from each other in the first direction on a side of the first conductive line and connected to the first conductive line, and second conductive lines respectively connected to the memory cells. Each second conductive line is spaced apart in a second direction from the first conductive line. The second direction is parallel to the top surface of the substrate and intersects the first direction. The second conductive lines extend in a third direction perpendicular to the top surface of the substrate and are spaced apart from each other in the first direction. Each memory cell includes a variable resistance element and a select element that are positioned at a same level horizontally arranged in the second direction.