An imaging device includes a first pixel. The first pixel includes a first photoelectric conversion region disposed in a first substrate and that converts incident light into first electric charges. The first pixel includes a first readout circuit including a first converter that converts the first electric charges into a first logarithmic voltage signal. The imaging device includes at least one bonding pad on the first substrate and in electrical contact with the first converter. The at least one bonding pad overlaps at least part of the first pixel.

A semiconductor device includes thin film transistors each having an oxide semiconductor. The oxide semiconductor has a channel region, a drain region, a source region, and low concentration regions which are lower in impurity concentration than the drain region and the source region. The low concentration regions are located between the channel region and the drain region, and between the channel region and the source region. Each of the thin film transistors has a gate insulating film on the channel region and the low concentration regions, an aluminum oxide film on a first part of the gate insulating film, the first part being located on the channel region, and a gate electrode on the aluminum oxide film and a second part of the gate insulating film, the second part being located on the low concentration regions.

A transistor device having fin structures, source and drain terminals, channel layers and a gate structure is provided. The fin structures are disposed on a material layer. The fin structures are arranged in parallel and extending in a first direction. The source and drain terminals are disposed on the fin structures and the material layer and cover opposite ends of the fin structures. The channel layers are disposed respectively on the fin structures, and each channel layer extends between the source and drain terminals on the same fin structure. The gate structure is disposed on the channel layers and across the fin structures. The gate structure extends in a second direction perpendicular to the first direction. The materials of the channel layers include a transition metal and a chalcogenide, the source and drain terminals include a metallic material, and the channel layers are covalently bonded with the source and drain terminals.

A method of forming a semiconductor structure includes following operations. A memory layer is formed over the first gate electrode. A channel layer is formed over the memory layer. A first SUT treatment is performed. A second dielectric layer is formed over the memory layer and the channel layer. A source electrode and a drain electrode are formed in the second dielectric layer. A temperature of the first SUT treatment is less than approximately 400 C.

A crystalline oxide thin film contains an In element, a Ga element and an Ln element, in which the In element is a main component, the Ln element is at least one element selected from the group consisting of La, Nd, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, and Lu, and an average crystal grain size D.sub.1 is in a range from 0.05 m to 0.5 m.

A crystalline oxide thin film contains an In element, a Ga element and an Ln element, in which the In element is a main component, the Ln element is at least one element selected from the group consisting of La, Nd, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, and Lu, and an average crystal grain size D.sub.1 is in a range from 0.05 m to 0.5 m.

To provide an oxide semiconductor film having stable electric conductivity and a highly reliable semiconductor device having stable electric characteristics by using the oxide semiconductor film. The oxide semiconductor film contains indium (In), gallium (Ga), and zinc (Zn) and includes a c-axis-aligned crystalline region aligned in the direction parallel to a normal vector of a surface where the oxide semiconductor film is formed. Further, the composition of the c-axis-aligned crystalline region is represented by In.sub.1+Ga.sub.1O.sub.3(ZnO).sub.m (0<<1 and m=1 to 3 are satisfied), and the composition of the entire oxide semiconductor film including the c-axis-aligned crystalline region is represented by In.sub.xGa.sub.yO.sub.3(ZnO).sub.m (0<x<2, 0<y<2, and m=1 to 3 are satisfied).

An example two transistor (2T) gain cell memory with indium-gallium-zinc-oxide (IGZO) transistors. Examples include IGZO transistors included in a dynamic random access memory (DRAM) cell. The IGZO transistors included in the DRAM cell are described as being formed or created in a back end (BE) metal process stack of an integrated circuit chip or die.

A semiconductor device includes a first conductive layer extending along a first direction, a semiconductor layer extending along a second direction crossing the first direction, penetrating the first conductive layer, and including an oxide semiconductor, a first insulating layer between the first conductive layer and the semiconductor layer, a second conductive layer provided on one side of the semiconductor layer in the second direction and electrically connected thereto, a third conductive layer provided on the other side of the semiconductor layer in the second direction and electrically connected thereto, an electric conductor extending from the third conductive layer toward the second conductive layer along the semiconductor layer, and a charge storage film between the semiconductor layer and the electric conductor.

A semiconductor device includes a substrate, a channel layer, an insulating layer, source/drain contacts, a gate dielectric layer, and a gate electrode. The channel layer over the substrate and includes two dimensional (2D) material. The insulating layer is on the channel layer. The source/drain contacts are over the channel layer. The gate dielectric layer is over the insulating layer and the channel layer. The gate electrode is over the gate dielectric layer and between the source/drain contacts.