An electronic device mounting substrate includes: a first wiring substrate shaped in a rectangular frame, an interior of the rectangular frame constituting a first through hole; a second wiring substrate shaped in a rectangular frame or plate, the second wiring substrate being disposed so as to overlie a lower surface of the first wiring substrate and be electrically connected to the first wiring substrate; a metallic plate disposed so as to overlie a lower surface of the second wiring substrate so that the second wiring substrate is sandwiched between the metallic plate and the first wiring substrate; and a lens holder secured to an outer periphery of the metallic plate. A frame interior of the first wiring substrate, or a frame interior of each of the first wiring substrate and the second wiring substrate, constitutes an electronic device mounting space.

An imaging device which does not include a color filter and does not need arithmetic processing using an external processing circuit is provided. A first circuit includes a first photoelectric conversion element, a first transistor, and a second transistor; a second circuit includes a second photoelectric conversion element, a third transistor, and a fourth transistor; a third circuit includes a fifth transistor, a sixth transistor, a seventh transistor, and a second capacitor; the spectroscopic element is provided over the first photoelectric conversion element or the second photoelectric conversion element; and the first circuit and the second circuit is connected to the third circuit through a first capacitor.

A semiconductor structure includes a first optical waveguide and a second optical waveguide located on a sapphire substrate. The first optical waveguide and the second optical waveguide each include a core portion of gallium nitride (GaN), and a cladding layer laterally surrounding the core portion. The cladding layer includes a material having a refractive index less than a refractive index of the sapphire substrate.

A method of forming a semiconductor structure includes forming a first optical waveguide and a second optical waveguide on a sapphire substrate. The first optical waveguide and the second optical waveguide each include a core portion of gallium nitride (GaN), and a cladding layer laterally surrounding the core portion. The cladding layer includes a material having a refractive index less than a refractive index of the sapphire substrate. The method further includes etching a portion of the cladding layer to form a microfluidic channel therein and forming a capping layer on a top surface of the first optical waveguide, the second optical waveguide and the microfluidic channel.

A method of forming a semiconductor structure includes forming a first optical waveguide and a second optical waveguide on a sapphire substrate. The first optical waveguide and the second optical waveguide each include a core portion of gallium nitride (GaN), and a cladding layer laterally surrounding the core portion. The cladding layer includes a material having a refractive index less than a refractive index of the sapphire substrate. The method further includes etching a portion of the cladding layer to form a microfluidic channel therein and forming a capping layer on a top surface of the first optical waveguide, the second optical waveguide and the microfluidic channel.

A stacked semiconductor device structure includes a first semiconductor device and a second semiconductor device. The first semiconductor device includes a recessed surface portion bounded by opposing sidewall portions extending outward to define a recessed region. A conductive layer is disposed along at least the recessed surface portion. The second semiconductor device is disposed within the recessed region and is electrically connected to the conductive layer. In one embodiment, the stacked semiconductor device is connected to a conductive lead frame and is at least partially encapsulated by a package body.

[Object] To prevent crosstalk between color filters and the resulting variation in sensitivity between pixels while suppressing the increase in manufacturing cost.

[Solution] Provided is a solid state imaging device including: a plurality of photoelectric conversion units configured to receive incident light on a light receiving surface and generate a signal charge; color filters of at least three colors provided to correspond one-to-one to the plurality of photoelectric conversion units; and a partition wall formed between adjacent ones of the color filters so as to contain a color material of the same color as a color filter of a color different from colors of the adjacent color filters.

Methodologies and a device for simulating individual process steps and producing parameters representing each individual process signal profile are provided. Embodiments include collecting, by way of a programmed processor, wafer level data in the form of electrical signatures during processing steps in the production of a semiconductor device; converting the electrical signatures during each of the processing steps into signal matrix (MS) modeling parameters; comparing the MS modeling parameters to predefined MS modeling parameters; and adjusting at least one processing step based on a result of the comparing step for process control.

The invention relates to a passivated emitter rear solar cell, comprising a silicon substrate having a front and back surface, a rear passivation layer on the back surface of the silicon substrate having a plurality of open holes formed therein, an aluminum back contact layer formed in the open holes of the rear passivation layer, and at least one backside soldering tab on the back surface of the silicon substrate. The backside soldering tab is formed from an electroconductive paste composition comprising conductive metallic particles, at least one lead-free glass frit, and an organic vehicle comprising at least one silicone oil.

A carrier substrate includes a first major face and a second major face opposite the first major face. A diode structure is formed between the first major face and the second major face, which diode structure electrically insulates the first major face from the second major face at least with regard to one polarity of an electrical voltage.