A power module (10) includes a power semiconductor chip (1) and a Cu circuit (3) having the power semiconductor chip (1) provided on one surface. The power module (10) includes: a sintering layer (2) joining the power semiconductor chip (1) and the Cu circuit (3) by using a sintering paste; and a heat dissipation sheet (4) provided for joining a Cu base plate (5) to the other surface of the Cu circuit (3), in which in a first laminated structure in which the power semiconductor chip (1), the sintering layer (2), the Cu circuit (3), and the heat dissipation sheet (4) are laminated, the total thermal resistance XA in the direction of lamination is equal to or less than 0.30 (K/W).

A display device includes: a substrate including a main area and a sub-area overlapping each other; a plurality of light-emitting devices positioned on the main area and the sub-area of the substrate; a prism positioned between the main area and the sub-area; and a camera module positioned on one surface of the prism.

The present disclosure provides an electronic device, which includes an encapsulant, an electronic component, an antenna structure, and a first conductive element. The electronic component is disposed in the encapsulant. The antenna structure has an antenna pattern exposed to air and facing the encapsulant, and a first supporting element separating the antenna pattern from the encapsulant. At least a portion of the first conductive element is within the encapsulant, and electrically connects the antenna pattern to the electronic component by the first supporting element.

An IC die includes a temperature control element suitable for three-dimensional IC package with enhanced thermal control and management. The temperature control element may be formed as an integral part of an IC die that may assist temperature control of the IC die when in operation. The temperature control element may include a heat dissipation material disposed therein to assist dissipating thermal energy generated by the plurality of devices in the IC die during operation.

The present disclosure provides a light-emitting substrate, a method for manufacturing the same, and a display device. The light-emitting substrate includes: a substrate including a light-emitting region; a first conductor on the substrate and at least in the light-emitting region, the first conductor extending along a first direction in the light-emitting region; a second conductor on the first conductor and arranged in the light-emitting region, the second conductor including a first connecting portion; and a first insulator within the light-emitting region. The first connecting portion extends along a second direction, an orthographic projection of the first connecting portion on the substrate at least partially overlaps with an orthographic projection of the first conductor on the substrate to constitute an overlapping region. The first insulator is only between the first connecting portion and the first conductor, the overlapping region is within an orthographic projection of the first insulator on the substrate.

A package structure is provided. The package structure includes a substrate and a semiconductor chip over the substrate. The package structure also includes a protective film laterally surrounding the semiconductor chip. The package structure further includes an underfill element between the semiconductor chip and the protective film. A portion of the underfill element is directly below the protective film.

A method of manufacturing a light-emitting element, and a light-emitting element array substrate and a display device including the same are provided. A method of manufacturing a light-emitting element includes: forming a base substrate including a plurality of protrusions and a rod area which is a remaining area except for the plurality of protrusions; forming a buffer layer on the base substrate; forming a semiconductor structure including a first semiconductor material layer, a light-emitting material layer, and a second semiconductor material layer on the buffer layer; forming a plurality of mask patterns overlapping the rod area on the semiconductor structure; forming element rods by removing the semiconductor structure overlapping the plurality of protrusions using the plurality of mask patterns; forming an insulating film around an outer surface of each of the element rods. and separating the element rods from the buffer layer.

An interconnected semicondcutor subassembly structure and formation thereof. The interconnected semicondcutor subassembly structure includes an interconnect structure, and first and second semicondcutor dies bonded to respective portions of a top surface of the interconnect structure. The interconnected semicondcutor subassembly structure further includes an underfill layer formed within a first gap located between a bottom surface of the first semiconductor die and the first portion the top surface of the interconnect structure, formed within a second gap located between the bottom surface of the second semiconductor die and the second portion of the top surface of the interconnect structure, and formed within a first portion of a third gap located between the first semicondcutor die and the second semicondcutor die. A top surface of the underfill layer formed within the first portion of the third gap located between the first and second semicondcutor dies has a concave meniscus shape.

A display device includes pixels. Each of the pixels includes electrodes disposed on a base layer; a first insulating layer disposed on the electrodes; a light emitting element disposed on the first insulating layer; a bank disposed on the first insulating layer and protruding in a thickness direction of the base layer; and a second insulating layer, at least a portion of the second insulating layer being disposed on the first insulating layer. At least part of the electrodes of a pixel among the pixels are spaced apart from at least part of the electrodes of another pixel adjacent to the pixel with an open area being disposed between the electrodes. The first insulating layer includes a first opening overlapping the open area in a plan view, and the second insulating layer includes a second opening overlapping the open area in a plan view.

Aspects of the disclosure include a light feeding system for a display that uses micro light-emitting diodes (LEDs) laminated into glass for light guide applications. An exemplary display can include a light feeding system having one or more micro LEDs on a surface of a backplane. An optical bonding collimator is positioned over and in direct contact with a surface of the micro LEDs. The optical bonding collimator is on the surface of the backplane. A light guide is coupled to an end of the optical bonding collimator such that the optical bonding collimator is between the light guide and the backplane. One or more inner reinforcing layers are in direct contact with the light feeding system and one or more outer layers are in direct contact with the inner reinforcing layers. The light feeding system is laminated with the inner reinforcing layers and the outer layers.