A semiconductor device includes: a first lead including a base portion; a semiconductor element mounted on a first side of the base portion in the thickness direction and including a first electrode; a second lead spaced apart from the base portion in a first direction perpendicular to the thickness direction; a first conductive member electrically bonded to the first electrode and the second lead; and a sealing resin. The first conductive member includes a first portion bonded to the first electrode via a conductive first bonding layer. The first portion includes a first surface and a second surface respectively facing the first side and a second side in the thickness direction. The first portion includes a plurality of first recesses that are recessed from the first surface and a plurality of second recesses that are recessed from the second surface.

A functional substratincludes a first dielectric substrate, which includes a first surface and a second surface oppositely arranged along a thickness direction of the first dielectric substrate; the first dielectric substrate is provided with a first connection hole at least penetrating through the first surface; a first connection electrode is arranged in the first connection hole, whih includes a first sub-hole and a second sub-hole sequentially arranged along a direction away from the second surface and communicated with each other; the second sub-hole penetrates through the first surface; an opening width of the second sub-hole is monotonically increased in the direction away from the second surface, and a minimum opening width of the second sub-hole is not smaller than a maximum opening width of the first sub-hole; the first and second sub-holes form a corner at a position where the first sub-hole and the second sub-hole are connected.

A system and a method for a semiconductor integrated package are disclosed. An interposer has a top surface and a bottom surface. A first circuit layer is disposed on the top surface by a first bonding and has at least one first circuit. A second circuit layer is disposed on the first circuit layer by a second bonding and has at least one second circuit. A thermal layer having an embedded liquid cooling channel is bonded on the second circuit layer.

A bonded structure can include a first reconstituted element comprising a first element and having a first side comprising a first bonding surface and a second side opposite the first side. The first reconstituted element can comprise a first protective material disposed about a first sidewall surface of the first element. The bonded structure can comprise a second reconstituted element comprising a second element and having a first side comprising a second bonding surface and a second side opposite the first side. The first reconstituted element can comprise a second protective material disposed about a second sidewall surface of the second element. The second bonding surface of the first side of the second reconstituted element can be directly bonded to the first bonding surface of the first side of the first reconstituted element without an intervening adhesive along a bonding interface.

A package structure is provided, which includes a redistribution structure, an interposer substrate disposed over the redistribution structure, a first semiconductor die disposed between the redistribution structure and the interposer substrate, a second semiconductor die partially overlapping the first semiconductor die in a direction perpendicular to a surface of the redistribution structure, and a first protective layer surrounding the first semiconductor die.

A method of manufacturing a metal structure for an optical semiconductor device, including a treatment step (1) of immersing in and/or applying the solution containing a polyallylamine polymer a base body, the base body including an outermost layer at a portion or entire surfaces of the base body, the outermost layer including a plating of at least one selected from the group consisting of gold, silver, a gold alloy, and a silver alloy, so as to manufacture the metal structure for an optical semiconductor device having an increased adhesion to a resin material.

Disclosed is a semiconductor package comprising a redistribution substrate and a semiconductor chip on the redistribution substrate. The redistribution substrate includes a plurality of first conductive patterns including a pair of first signal patterns that are adjacent to each other, and a plurality of second conductive patterns on surfaces of the first conductive patterns and coupled to the first conductive patterns. The second conductive patterns include a ground pattern insulated from the pair of first signal patterns. The ground pattern has an opening that penetrates the ground pattern. When viewed in plan, the pair of first signal patterns overlap the opening.

A power module includes: a first substrate having an outer surface and an inner surface; a semiconductor die coupled to the inner surface of the first substrate; a second substrate having an outer surface and an inner surface, the semiconductor die being coupled to the inner surface of the second substrate; and a flex circuit coupled to the semiconductor die.

An electronic package is disclosed. The electronic package includes an electronic component and a plurality of power regulating components. The plurality of power regulating components includes a first power regulating component and a second power regulating component. A first power path is established from the first power regulating component to a backside surface of the electronic component. A second power path is established from the second power regulating component to the backside surface of the electronic component.

A semiconductor structure includes: a high-speed circuit module including a clock signal with a frequency greater than a first threshold; a first conductive metal layer including power conductive wires extending along a first direction and arranged at intervals, and the power conductive wires being electrically connected with the high-speed circuit module; and a redistribution layer located above the first conductive metal layer and including power pads and electrical wires connected with the power pads, in which the power pads are located at one side of the high-speed circuit module, a projection of the power pads does not overlap with that of the high-speed circuit module, the electrical wires include a first electrical wire region where the electrical wires are repeatedly bent, the first electrical wire region at least partially covers the high-speed circuit module, and the electrical wires are used for electrically connecting the power conductive wires and power pads.