A packaging structure and a formation method thereof are provided. The packaging structure includes a carrier board, and a plurality of semiconductor chips adhered to the carrier board. Each semiconductor chip has a functional surface and a non-functional surface opposite to the functional surface, and a plurality of pads are formed on the functional surface of a semiconductor chip of the plurality of chips. A metal bump is formed on a surface of a pad of the plurality of pads, and a first encapsulation layer is formed on the functional surface. The packaging structure also includes a second encapsulation layer formed over the carrier board.

A stacked integrated circuit includes a first chip including a first through via set and a second through via set that are disposed to be symmetrical to each other in relation to a first rotating axis and including a first input and output (IO) circuit and a second IO circuit that are disposed to be asymmetrical to each other in relation to the first rotating axis and a second chip including a third through via set and a fourth through via set that are disposed to be symmetrical to each other in relation to a second rotating axis and including a third IO circuit and a fourth IO circuit that are disposed to be asymmetrical to each other in relation to the second rotating axis, the second chip being rotated around the second rotating axis and stacked on the first chip.

A microelectronic assembly comprises a first microelectronic component; a second microelectronic component under an area of the first microelectronic component and coupled to the first component through first interconnect structures within a central region of the area, and second interconnect structures within a peripheral region of the area, adjacent to the central region. A heterogenous dielectric surface on the first or second component or both and within a gap between the first and second components has a first surface composition within the central region and at least a second surface composition within the peripheral region.

A semiconductor structure includes a core layer; a passive component disposed within the core layer; and a first redistribution layer disposed over the core layer, wherein the first redistribution layer includes a first interconnect, a second interconnect, and a third interconnect disposed between and electrically isolated from the first interconnect and the second interconnect. The third interconnect is electrically connected to the passive component, and at least one of the first interconnect and the second interconnect is electrically isolated from the passive component. A method of manufacturing the semiconductor structure includes providing a first bias between the first interconnect and the second interconnect, providing a second bias to the passive component through the third interconnect, wherein the first bias is greater than the second bias.

According to one embodiment, semiconductor device includes: a substrate; first to fourth conductive portions provided on the substrate; a first transistor having a drain and a source connected to the first and the second conductive portion, respectively; and second and third transistors each having a drain, a source, and a gate connected to the second, the third, and the fourth conductive portion, respectively; wherein the fourth conductive portion includes sixth and seventh portions to which each of the gate of the second and the third transistors is connected, respectively, and an eighth portion connecting the sixth portion and the seventh portion, and a shape of the eighth portion is different from a shape of the sixth and the seventh portions.

Embodiments include circuitry and circuit elements such as contact arrays for harvesting power and soft connectors and patches for connecting flexible and stretchable soft circuits.

A high frequency module includes a SAW filter, a substrate over which the SAW filter is mounted, a shield electrode, a ground electrode, and a connection member. The SAW filter has major surfaces opposite to each other and a side surface. The shield electrode covers at least part of the side surface of the SAW filter. The ground electrode is disposed on the substrate, and is connected to a ground potential. The connection member is disposed outside the SAW filter, and electrically connects the shield electrode to the ground electrode.

Methods to fabricate a semiconductor device, the method including: forming a first level, the first level including a single crystal silicon layer, a plurality of transistors, and a plurality of first metal layers, where each transistor of the plurality of transistors includes a single crystal channel, and where the plurality of first metal layers include interconnections between the transistors of the plurality of transistors; thinning the single crystal silicon layer to a thickness of less than two microns; forming a second level, the second level including a plurality of second metal layers, where the second level is disposed underneath the first level; and forming a connection path between at least one of the transistors to at least one of the plurality of second metal layers, where the connective path includes at least one via disposed through at least the single crystal silicon layer.

According to an embodiment, a semiconductor device having a first surface facing a first side and a second surface facing a second side opposite to the first side is provided. The semiconductor device of the embodiment includes a semiconductor device body, a lead frame to which the semiconductor device body is electrically connected, a conductive bump portion electrically connected to a semiconductor device body or the lead frame, and a resin portion configured to cover and hold at least a part of the semiconductor device body and at least a part of the lead frame. At least a part of the conductive bump portion is exposed outside the resin portion.

Methods for fabricating flexible interposers for providing electrical connection between devices mounted at different vertical positions with respect to a substrate or a planar interposer. A bonded structure may comprise a bent flexible interposer extending from a first interposer portion between a main device on the substrate or the planar interposer and a second interposer portion above the main device and above or below a device positioned above the main device and electrically connected to the main device via a bent portion of the flexible interposer.