Patent classifications
H10P90/00
BONDING APPARATUS, BONDING SYSTEM AND BONDING METHOD
A bonding apparatus configured to bond substrates comprises a first holder configured to vacuum-exhaust a first substrate to attract and hold the first substrate on a bottom surface thereof; a second holder disposed under the first holder, and configured to vacuum-exhaust a second substrate to attract and hold the second substrate on a top surface thereof; a mover configured to move the first holder and the second holder relatively in a horizontal direction; a laser interferometer system configured to measure a position of the first holder or the second holder which is moved by the mover; a linear scale configured to measure a position of the mover; and a controller configured to control the mover based on a measurement result of the laser interferometer system and a measurement result of the liner scale.
Chamfered silicon carbide substrate and method of chamfering
The present invention relates to a chamfered silicon carbide substrate which is essentially monocrystalline, and to a corresponding method of chamfering a silicon carbide substrate. A silicon carbide substrate according to the invention comprises a main surface (102), wherein an orientation of said main surface (102) is such that a normal vector ({right arrow over (O)}) of the main surface (102) includes a tilt angle with a normal vector ({right arrow over (N)}) of a basal lattice plane (106) of the substrate, and a chamfered peripheral region (110), wherein a surface of the chamfered peripheral region includes a bevel angle with said main surface, wherein said bevel angle is chosen so that, in more than 75% of the peripheral region, normal vectors ({right arrow over (F)}_i) of the chamfered peripheral region (110) differ from the normal vector of the basal lattice plane by less than a difference between the normal vector of the main surface and the normal vector of the basal lattice plane of the substrate.
METHOD FOR TRANSFERRING A SEMICONDUCTOR LAYER
A method for transferring a semiconductor layer from a donor substrate to a receiver substrate includes first implantation of first light ions into the donor substrate at a predetermined implantation depth to form a buried fragile plane, epitaxy on the donor substrate of the semiconductor layer, second implantation of second light ions into the donor substrate through the semiconductor layer to be transferred level with the fragile plane, assembly by bonding of the receiver substrate and of the donor substrate covered with the semiconductor layer to be transferred, the semiconductor layer to be transferred being placed between the receiver substrate and donor substrate, and fracturing by annealing the donor substrate along the buried fragile plane, the first ions implanted with a first dose so that there is no fracturing at the predetermined implantation depth, and the second ions implanted with a second dose such that the donor substrate fractures.
Semiconductor-on-insulator substrate for RF applications
A semiconductor-on-insulator substrate for use in RF applications, such as a silicon-on-insulator substrate, comprises a semiconductor top layer, a buried oxide layer and a passivation layer over a support substrate. In addition, a penetration layer is provided between the passivation layer and the silicon support substrate to ensure sufficient high resistivity below RF features and avoid increased migration of dislocations in the support substrate. RF devices may be fabricated on and/or in such a semiconductor-on-insulator substrate.
METHOD FOR MAKING SEMICONDUCTOR DEVICE INCLUDING AN ENRICHED SILICON 28 EPITAXIAL LAYER
A method for making a semiconductor device may include growing .sup.28Si on a semiconductor layer, intermixing the .sup.28Si in the semiconductor layer, and thinning the semiconductor layer after intermixing. The method may further include repeating growing, intermixing, and thinning until a concentration of .sup.28Si in the semiconductor layer reaches a target concentration.
Support for a semiconductor structure
A support for a semiconductor structure includes a base substrate, a first silicon dioxide insulating layer positioned on the base substrate and having a thickness greater than 20 nm, and a charge trapping layer having a resistivity higher than 1000 ohm.Math.cm and a thickness greater than 5 microns positioned on the first insulating layer.
Support for a semiconductor structure
A support for a semiconductor structure includes a base substrate, a first silicon dioxide insulating layer positioned on the base substrate and having a thickness greater than 20 nm, and a charge trapping layer having a resistivity higher than 1000 ohm.Math.cm and a thickness greater than 5 microns positioned on the first insulating layer.
Method for the separation of structures from a substrate
A method and a device for the separation of structures from a substrate. Furthermore, the invention relates to a method and a device for transferring structures from a first substrate to a second substrate.
Method for the separation of structures from a substrate
A method and a device for the separation of structures from a substrate. Furthermore, the invention relates to a method and a device for transferring structures from a first substrate to a second substrate.
Device and method for fabricating a patterned FD-SOI wafer including exposed buried oxide
Methods for preparing a donor silicon wafer by applying a SiGe layer on a silicon substrate wafer, depositing a silicon layer on the SiGe layer, etching the silicon layer to form an opening in the silicon layer, wet etching the SiGe layer through the opening in the silicon layer to partially remove SiGe material from the SiGe layer and preserve the silicon layer, depositing a buried oxide layer on the silicon layer, etching the buried oxide layer to form a body bias area, and depositing silicon in the body bias area; bonding a recipient handle wafer to the etched buried oxide layer of the donor silicon wafer to define a BOX; and wet etching the SiGe layer to release the donor silicon wafer from the recipient handle wafer.