H10W44/00

SEMICONDUCTOR PACKAGE AND PACKAGE-ON-PACKAGE HAVING DIFFERENT WIRING INSULATING LAYERS SURROUNDING DIFFERENTIAL SIGNAL WIRING LAYERS
20260130225 · 2026-05-07 · ·

A semiconductor includes: a lower equipotential plate provided in a lower wiring layer; an upper equipotential plate provided in an upper wiring layer; a pair of differential signal wiring lines provided in a signal wiring layer that is between the lower equipotential plate and the upper equipotential plate, wherein the pair of differential signal wiring lines includes a first differential signal wiring line and a second differential signal wiring line which are spaced apart from each other and extend in parallel; and a wiring insulating layer surrounding the pair of differential signal wiring lines, and filling between the signal wiring layer, the lower wiring layer, and the upper wiring layer. The wiring insulating layer includes a first wiring insulating layer surrounding the pair of differential signal wiring lines, and a second wiring insulating layer, and the first wiring insulating layer and the second wiring insulating layer include different materials.

SEMICONDUCTOR PACKAGE AND PACKAGE-ON-PACKAGE HAVING DIFFERENT WIRING INSULATING LAYERS SURROUNDING DIFFERENTIAL SIGNAL WIRING LAYERS
20260130225 · 2026-05-07 · ·

A semiconductor includes: a lower equipotential plate provided in a lower wiring layer; an upper equipotential plate provided in an upper wiring layer; a pair of differential signal wiring lines provided in a signal wiring layer that is between the lower equipotential plate and the upper equipotential plate, wherein the pair of differential signal wiring lines includes a first differential signal wiring line and a second differential signal wiring line which are spaced apart from each other and extend in parallel; and a wiring insulating layer surrounding the pair of differential signal wiring lines, and filling between the signal wiring layer, the lower wiring layer, and the upper wiring layer. The wiring insulating layer includes a first wiring insulating layer surrounding the pair of differential signal wiring lines, and a second wiring insulating layer, and the first wiring insulating layer and the second wiring insulating layer include different materials.

SEMICONDUCTOR DEVICE
20260130227 · 2026-05-07 ·

A semiconductor device includes a substrate, a plurality of semiconductor elements, and a main terminal. Each of the plurality of semiconductor elements has a main electrode. The plurality of semiconductor elements are disposed on one surface of the substrate, and are connected in parallel to each other. The main terminal is a common connection target to which the plurality of semiconductor elements are electrically connected. A wiring resistance between the main terminal and the main electrode of a corresponding semiconductor element is different in accordance with a number of semiconductor elements disposed adjacent to the corresponding semiconductor element, and the wiring resistance increases as the number of the semiconductor elements disposed adjacent to the corresponding semiconductor element increases.

SEMICONDUCTOR DEVICE
20260130226 · 2026-05-07 ·

A semiconductor device includes an insulating substrate, a plurality of semiconductor elements, a gate terminal, a printed circuit board and a passive component. The insulating substrate has a wiring. Each of the plurality of semiconductor elements has a first main electrode disposed on a first surface, a second main electrode disposed on a second surface opposite to the first surface, and a gate pad disposed on the second surface. The first main electrodes of the plurality of semiconductor elements are commonly connected to the wiring. The printed circuit board provides a gate wiring that electrically relays the gate pad and the gate terminal. The passive component includes a ferrite bead or a balance resistor. The passive component is mounted on the printed circuit board to adjust an impedance of the gate wiring.