Various aspects relate to three-dimensional integrated circuits including a plurality of conformal integrated circuit slices stacked one upon the other. The plurality of conformal integrated circuit slices includes various components. A communication face defines a communication surface configured to conform to a portion of a topography of a non-planar host substrate. A plurality of input-output devices is configured to communicate to a corresponding plurality of host-side input-output devices associated with the non-planar host substrate.

A grinding method includes the following steps. Firstly, a dressing layer is formed on a semiconductor structure. Then, a grinding tool grinds the dressing layer and semiconductor structure.

Methods and apparatus reduce chucking abnormalities for electrostatic chucks by ensuring proper planarizing of ceramic surfaces of the electrostatic chuck. In some embodiments, a method for planarizing an upper ceramic surface of an electrostatic chuck assembly may comprise placing the electrostatic chuck assembly in a first planarizing apparatus, altering an upper ceramic surface of the electrostatic chuck assembly, and halting the altering of the upper ceramic surface of the electrostatic chuck assembly when an S.sub.a parameter is less than approximately 0.1 microns, an S.sub.dr parameter is less than approximately 2.5 percent, an S.sub.z parameter is less than approximately 10 microns for any given area of approximately 10 mm.sup.2 of the upper ceramic surface, or a pit-porosity depth parameter of greater than 1 micron is less than approximately 0.1 percent of area of the upper ceramic surface.

Disclosed herein are methods for direct bonding. In some embodiments, the direct bonding method includes microwave annealing a dielectric bonding layer of a first element by exposing the dielectric bonding layer to microwave radiation and then directly bonding the dielectric bonding layer of the first element to a second element without an intervening adhesive. The bonding method also includes depositing the dielectric bonding layer on a semiconductor portion of the first element at a first temperature and microwave annealing the dielectric bonding layer at a second temperature lower than the first temperature.

A substrate processing method includes a processing film forming step in which a processing liquid is supplied to a front surface of a substrate and the processing liquid on the front surface of the substrate is solidified or cured to form a processing film on the front surface of the substrate, an etching facilitating step in which the processing film is subjected to etching function developing processing, thereby facilitating etching at a surface layer portion of the substrate by the processing film, and an etching reducing step in which the processing film is subjected to etching function eliminating processing, thereby reducing the etching at the surface layer portion of the substrate by the processing film in a state that the processing film is kept on the substrate.

A back grinding adhesive film used to protect a surface of a wafer, the back grinding adhesive film including a base material layer, and an adhesive resin layer which is formed on one surface side of the base material layer and configured with an ultraviolet curable adhesive resin material, in which, when a viscoelastic characteristic is measured after curing the ultraviolet curable adhesive resin material by irradiating with an ultraviolet ray, a storage elastic modulus at 5 C. E (5 C.) is 2.010.sup.6 to 2.010.sup.9 Pa, and a storage elastic modulus 100 C. E (100 C.) is 1.010.sup.6 to 3.010.sup.7 Pa.

A wafer processing method includes emitting a laser beam along an annular line that is a predetermined distance inward of the outer circumferential edge of the first wafer to form, in the first wafer, an annular first modified layer and a first crack extending from the first modified layer to make an appearance on the front surface, thereby causing the first wafer to become warped at an outer circumferential region thereof that lies closer to the outer circumferential edge than does the first modified layer and the first crack; bonding the front surface of the first wafer to a second wafer to form a bonded wafer stack; and grinding a rear surface of the first wafer of the bonded wafer stack to thin the first wafer to a finish thickness.

A method is described for method for patterning a metal layer interfaced with a transparent conductive film, in which the method comprises contacting a structure through a patterned mask with an etching solution comprising Fe.sup.+3 ions, wherein the structure comprises the metal layer comprising copper, nickel, aluminum or alloys thereof covering at least partially a transparent conductive film with conductive elements comprising silver, to expose a portion of the transparent conductive film. Etching solutions and the etched structures are also described.

The present invention is an IC chip mounting apparatus including: a conveyor configured to convey an antenna continuous body on a conveying surface, the antenna continuous body having a base material and plural inlay antennas continuously formed on the base material; an IC chip placement unit configured to place an IC chip on a photo-curable adhesive that is located on a reference position of each antenna in the antenna continuous body; and a light irradiator configured to irradiate, with light, the adhesive of each antenna of the antenna continuous body that is conveyed by the conveyor, wherein the light irradiator is configured to irradiate the adhesive of each antenna with the light, while the IC chip on the adhesive is pressed to the antenna.

A grinding apparatus and a method for manufacturing a semiconductor device using the same are provided. A grinding apparatus includes a chuck unit configured to receive a substrate, a grinding unit on a part of the chuck unit and configured to grind the substrate, and a dressing unit under a part of the grinding unit adjacent to the chuck unit and including a dressing board configured to dress the grinding unit and magnets under the dressing board.