A semiconductor device structure and method of manufacturing the same are provided. The semiconductor device structure includes an interposer and a first electronic component. The interposer includes a first semiconductor die and a second semiconductor die. The first semiconductor die includes a first cache memory and a first memory control circuit. The second semiconductor die includes a second cache memory and a second memory control circuit. The first electronic component is disposed on the interposer and in communication with the first semiconductor die and the second semiconductor die.

Provided are a semiconductor package, in which an underfill material may enter a gap easily, and a method of manufacturing the semiconductor package. Here, the semiconductor package has a die and a plurality of pillars disposed on one surface of the die, and a thickness of the die corresponding to a region having pillars on the one surface of the die is less than a thickness of the die corresponding to a region without pillars on the one surface of the die.

A substrate processing apparatus configured to process a combined substrate in which a first substrate and a second substrate are bonded to each other includes a holding member configured to hold the combined substrate; a removing member configured to separate at least a peripheral portion of the first substrate from the second substrate by being inserted between the first substrate and the second substrate; an elevating mechanism configured to adjust a relative height position of the removing member with respect to the holding member; and a controller configured to control an operation of the elevating mechanism. The controller controls the operation of the elevating mechanism such that the relative height position of the removing member with respect to a target insertion position of the removing member is adjusted in an entire circumference of the combined substrate.

A method for producing a laminated film for temporary fixation of a semiconductor member to a support member includes providing a first curable resin layer on one surface of a metal foil and providing a second curable resin layer on the other surface of the metal foil to obtain the laminated film. A laminated film used for temporarily fixing a semiconductor member to a support member includes a first curable resin layer, a metal foil, and a second curable resin layer laminated in sequence.

An etching processing system includes a memory, and a processor coupled to the memory and configured to predict etching quality of a substrate by inputting image data of the substrate into a trained model trained by using training data in which image data of substrates captured by an imaging device arranged on a transfer path of the substrates and information for predicting etching quality of the substrates are associated with each other.

The invention relates to a method for producing modifications (9) in the interior of a solid body (1). The method comprises the introduction of laser radiation (14) of a laser (29) into the interior of the solid body (1) via a first surface (8) of the solid body (1). The solid body (1) forms a crystal structure. Modifications (9) are produced at predefined points in a production plane (4) in the interior of the solid body (1) by the laser radiation (14). The modifications (9) are closer to the first surface (8) than to a second surface, the second surface being parallel to the first surface (8). A plurality of linear forms (103) can be produced by the modifications (9). The solid body (1) cracks subcritically in the region of each modification (9). The subcritical cracks have an average crack length of less than 150 m orthogonally to the direction of longitudinal extent of the linear form in question. Modifications (9) that belong to the same linear form (103) and that are produced one after the other are produced at a distance from each other that is defined by the function (dx)/d<0.31, where x>d.

A method includes forming a first sealing layer at a first edge region of a first wafer; and bonding the first wafer to a second wafer to form a wafer stack. At a time after the bonding, the first sealing layer is between the first edge region of the first wafer and a second edge region of the second wafer, with the first edge region and the second edge region comprising bevels. An edge trimming process is then performed on the wafer stack. After the edge trimming process, the second edge region of the second wafer is at least partially removed, and a portion of the first sealing layer is left as a part of the wafer stack. An interconnect structure is formed as a part of the second wafer. The interconnect structure includes redistribution lines electrically connected to integrated circuit devices in the second wafer.

According to embodiments of the present invention, there are provided a polishing pad and a process for preparing a semiconductor device using the polishing pad. The polishing pad comprises a polishing layer comprising a polishing surface and having a plurality of pores formed therein, wherein the contact area ratio of the polishing surface according to Equation 1 is 0.76% or more. Surface defects of a film substance to be polished can be suppressed, and polishing efficiency and uniformity can be improved.

A method is of manufacturing a plurality of devices by dividing a device wafer along a plurality of planned dividing lines intersecting each other, the device wafer having a device surface on which each of the devices is formed in each of regions partitioned by the planned dividing lines. The method includes: directly bonding a carrier plate to the device surface of the device wafer; after the bonding of the carrier plate, dicing the device wafer supported by the carrier plate along the planned dividing lines to thereby form a plurality of devices; and after the forming of the plurality of devices, separating the plurality of devices from the carrier plate.

A method for grinding a wafer is provided. The method comprises: providing a wafer having a back side and a front side opposite to the back side, wherein the wafer further comprises a central zone for accommodating semiconductor units and a peripheral zone surrounding the central zone; forming a trench within the peripheral zone and extending along substantially an entire circumference of the peripheral zone, wherein the trench is exposed from the front side of the wafer; filling the trench with a filler to form a spacer ring within the peripheral zone, wherein the spacer ring isolates the central zone from an edge of the wafer; attaching the wafer onto a platform at the front side of the wafer; and grinding the wafer from the back side of the wafer.