A semiconductor device includes a package body having a topside in a first plane and a bottom side in a second plane parallel to the first plane. At least one lead protruding out of the package body has a first portion in a plane parallel to the first plane and a second portion being bent away from the first plane towards the second plane. A cavity is positioned between the at least one lead and a feature of the semiconductor device. A removable dielectric spacer is configured to be positioned in the cavity between the at least one lead and the feature. The dielectric spacer is longer than the at least one lead.

A system board includes a module board that connects to the system board with an interposer having compressible connectors. The module board can further be covered by a shield that has a metal alloy having an element to provide good electrical conductivity and an element to provide structural integrity and heat transfer. The module board can further include gaskets to interconnect the shield to a ground plane of the module board. the interposer board can further include an extra column of ground connections to reduce signaling noise between the interposer board and the system board.

An object of the present invention is to provide a wiring board for mounting a semiconductor device capable of increasing the design flexibility of a 3D multilayer structure and method for producing the wiring board. One aspect is a wiring board for mounting a semiconductor device. The wiring board includes a first connection terminal area and a second connection terminal area on a semiconductor device mounting surface, in which the first connection terminal area includes a first connection terminal including a first connection pad and a solder bump, the second connection terminal area includes a second connection terminal including a second connection pad and a solder bump, and the first connection pad is covered by a solder resist layer on its side surface and a part of the top surface, whereas the second connection pad is not covered by a solder resist layer on its side surface and top surface.

Embodiments of this application disclose a chip package structure and an electronic device. The chip package structure includes a substrate and a housing; a chip and a supporting member, disposed on a first surface of the substrate, where the supporting member is disposed around the chip, and both the chip and the supporting member are located in a cavity; a spraying module which is disposed on the housing; and a first sealing member which is disposed between the supporting member and the housing. In this way, heat may be dissipated for the chip in a liquid cooling manner, thereby improving heat dissipation performance of the chip. The sealing member is disposed between the supporting member and the housing along a radial direction, to seal a region outside the first surface of the substrate. In addition, this facilitates disassembly/assembly, and reduces pressure on the chip during mounting.

A reversible attachment micro connector includes a pin and mounted on a first assembly and a socket mounted on a second assembly. The socket is operational to mate with the pin at least two times to establish an electrical connection, and separate from the pin at least once. The socket includes a surround structure that defines a cavity with a floor. The cavity is sized to receive the pin. Multiple tabs are disposed in the cavity and coupled to the surround structure. The tabs have a negative longitudinal curvature that protrudes into the cavity. The tabs bend in three dimensions during insertion of the pin and removal of the pin. The negative longitudinal curvature generates a stress distribution that is uniform between the pin and the tabs while the pin is seated in the socket. The pin is retained in the socket based on the stress distribution.