An IGZO thin-film transistor and a method for manufacturing same. The method includes: acquiring a substrate; forming an IGZO layer on the substrate by a solution process; doping V impurities on a surface of the IGZO layer by a spin doping process; forming a source electrode at one side of the IGZO layer, and forming a drain electrode at the other side; forming a gate dielectric layer on the doped IGZO layer; and forming a gate electrode on the gate dielectric layer.

The invention relates to a method for annealing of at least two wafers bonded via low-temperature direct bonding comprising heating the bonded wafers up to a first annealing temperature in the range of 100 C. to 500 C., preferably 150 C. to 400 C., even more preferred 150 C. to 200 C., holding the first annealing temperature in a range of 1 to 4 hours, preferably 1 to 3 hours, cooling down the bonded wafers to room temperature, re-heating the bonded wafers to a second annealing temperature in the range of 100 C. to 500 C., preferably 150 C. to 400 C., even more preferred 150 C. to 200 C., and cooling down the bonded wafers to room temperature.

A method of direct bonding comprising the following steps: supplying a first substrate and a second substrate, the first substrate being covered by a first hydrophilic surface and the second substrate being covered by a second hydrophilic surface, deposition of a specific molecule on the first hydrophilic surface and/or on the second hydrophilic surface, the specific molecule comprising a hydrophilic functional group and a basic functional group, separated by at least one atom, contacting the first hydrophilic surface with the second hydrophilic surface, whereby the two hydrophilic surfaces are bonded one with the other, and the first substrate and the second substrate are assembled, optionally, application of a bonding annealing heat treatment, preferably at a temperature less than or equal to 500 C.

A method of processing a wafer includes forming a bonded wafer assembly by bonding one of opposite surfaces of a first wafer to a second wafer, the first wafer having a device region and an outer circumferential excessive region, applying a laser beam to the first wafer while positioning a focused spot of the laser beam radially inwardly from the outer circumferential edge of the first wafer, on an inclined plane that is progressively closer to the one of the opposite surfaces of the first wafer toward the outer circumferential edge, thereby forming a separation layer shaped as a side surface of a truncated cone, grinding the first wafer from the other one of the opposite surfaces thereof to thin down the first wafer to a predetermined thickness, and detecting whether or not the outer circumferential excessive region has been removed from the first wafer.

A method for producing a semiconductor structure comprises: a) providing a working layer of a semiconductor material; b) providing a carrier substrate of a semiconductor material; c) depositing a thin film of a semiconductor material different from that or those of the working layer and the carrier substrate on a free face to be joined of the working layer and/or the carrier substrate; d) directly joining the free faces of the working layer and the carrier substrate, e) annealing the joined structure at an elevated temperature to bring about segmentation of the encapsulated thin film and form a semiconductor structure comprising an interface region between the working layer and the carrier substrate, the interface region comprising: regions of direct contact between the working layer and the carrier substrate; and agglomerates comprising the semiconductor material of the thin film adjacent the regions of direct contact.