A method and an apparatus for etching microstructures and the like that provides improved selectivity to surrounding materials when etching silicon using xenon difluoride (XeF2). Etch selectivity is greatly enhanced with the addition of hydrogen to the process chamber.

A power supply device supplies power to a substrate holder having a plurality of electrodes. The device includes a first fixed conductive member, a second fixed conductive member, a fixed insulating member fixed to an insulating housing portion and configured to insulate the first fixed conductive member from the second fixed conductive member, a first rotation conductive member, a second rotation conductive member, a rotation insulating member fixed to an insulating column portion and configured to insulate the first rotation conductive member from the second rotation conductive member, a first power supply member configured to supply a first voltage to the substrate holder via the first rotation conductive member and the first fixed conductive member, and a second power supply member configured to supply a second voltage to the substrate holder via the second rotation conductive member and the second fixed conductive member.

A manufacturing method for a magnetic head forms a leading shield having a top surface. The top surface of the leading shield includes first and second portions. The second portion is located farther from a medium facing surface than is the first portion, and recessed from the first portion. A first gap layer is then formed on the first portion. Then, a magnetic layer including an initial first side shield, an initial second side shield and a coupling section connecting them is formed using a mold. The mold is then removed. The coupling section is then removed by etching the magnetic layer. A second gap layer and a main pole are then formed in this order.

In some examples, a method includes forming a photoresist layer on a surface of a metallic substrate and developing the photoresist layer to define a pattern exposing a portion of the surface of the metallic substrate. The method also may include forming an electrically conductive layer on a surface of the photoresist layer and the exposed portions of the surface of the metallic substrate. The electrically conductive layer contacts the exposed portions of the surface of the metallic substrate. The method may further include submerging the substrate, the photoresist layer, and the electrically conductive layer in an electrolyte solution; and applying a voltage to between a cathode and an anode submerged in the electrolyte solution to anisotropically etch the metallic substrate where the electrically conductive layer contacts the exposed portions of the surface of the metallic substrate to form at least one feature in the metallic substrate.

In some examples, a method includes forming a photoresist layer on a surface of a metallic substrate and developing the photoresist layer to define a pattern exposing a portion of the surface of the metallic substrate. The method also may include forming an electrically conductive layer on a surface of the photoresist layer and the exposed portions of the surface of the metallic substrate. The electrically conductive layer contacts the exposed portions of the surface of the metallic substrate. The method may further include submerging the substrate, the photoresist layer, and the electrically conductive layer in an electrolyte solution; and applying a voltage to between a cathode and an anode submerged in the electrolyte solution to anisotropically etch the metallic substrate where the electrically conductive layer contacts the exposed portions of the surface of the metallic substrate to form at least one feature in the metallic substrate.

Provided is a method for increasing pattern density of a structure using an integration scheme and perform pitch splitting at the resist level without the use of hard mandrels, the method comprising: providing a substrate having a patterned resist layer and an underlying layer comprising a silicon anti-reflective coating layer, an amorphous layer, and a target layer; performing a resist hardening process; performing a first conformal spacer deposition using an atomic layer deposition technique with an oxide, performing a spacer first reactive ion etch process and a first pull process on the first conformal layer, performing a second conformal spacer deposition using titanium oxide; performing a second spacer RIE process and a second pull process, generating a second spacer pattern; and transferring the second spacer pattern into the target layer, wherein targets include patterning uniformity, pulldown of structures, slimming of structures, aspect ratio of structures, and line width roughness.

Nanocages are formed by etching nancubes. The nanocubes are added to an aqueous system having an amphiphilic lipid dissolved in an organic solvent (e.g. a hydrophobic alcohol) to form reverse micelles. As the water evaporates the micelles shrink as etching of the flat surface of the nanocubes occurs. In this fashion hollow nanocages are produced. In one embodiment, the nanocage is covalently attached to a polymer shell (e.g. a dextran shell).

Nanocages are formed by etching nancubes. The nanocubes are added to an aqueous system having an amphiphilic lipid dissolved in an organic solvent (e.g. a hydrophobic alcohol) to form reverse micelles. As the water evaporates the micelles shrink as etching of the flat surface of the nanocubes occurs. In this fashion hollow nanocages are produced. In one embodiment, the nanocage is covalently attached to a polymer shell (e.g. a dextran shell).

Techniques herein include methods for controllable lateral etching of dielectrics in polymerizing fluorocarbon plasmas. Methods can include dielectric stack etching that uses a mask trimming step as part of a silicon etching process. Using a fluorocarbon mixture for dielectric mask trimming provides several advantages, such as being straightforward to apply and providing additional flexibility to the process flow. Thus, techniques herein provide a method to correct or tune CDs on a hardmask. In general, this technique can include using a fluorine-based and a fluorocarbon-based, or fluorohydrocarbon-based, chemistry for creating a plasma, and controlling a ratio of the two chemistries. Without the hardmask trim method disclosed herein, if a hardmask CD is not on target, then a wafer is scrapped. With hard-mask trim capability in silicon etch as disclosed herein, a given CD can be re-targeted to eliminate wafer-scraps.

Provided is a substrate processing apparatus. The substrate treating apparatus includes a processing chamber, a substrate supporting unit, a plasma generation unit, a gas supplying unit, an exhaust adjusting unit, or the like. Residual gas and reaction by-products are generated in a chamber after a substrate is treated by using a gas supplied from the gas supplying unit or plasma excited by the plasma generation unit. The gas exhaust adjusting unit adjusts discharge amounts of residual gas and reaction by-products to adjust residence time or pressure of gas, plasma, or the like in the apparatus, thereby controlling a uniformity of the substrate treating process.