In one embodiment, a sensor circuit may include a first receiver circuit that may be configured to receive a first signal that is representative of a first mutual inductance and form a first detection signal that is representative of the first mutual inductance, wherein the first variable mutual inductance varies in response to a position of a metal object. An embodiment may include a second receiver circuit configured to receive a second signal that is representative of a second mutual inductance and form a second detection signal that is representative of the second mutual inductance, wherein the second mutual inductance varies in response to the position of the metal object. In an embodiment, the sensor circuit may include a recognition circuit configured to assert a movement detected signal responsively to a first value of the first detection signal, configured to assert a movement direction signal responsively to a first value of the second detection signal.

A capacitive sensor (20) includes a capacitive sensor field (2), the capacitive sensor field (2) having a plurality of discrete electrodes (4) which are coupled to discrete leads (8). The leads (8) of a first electrode (41) are guided such that they are capacitively coupled with at least one second electrode (42). A first signal (Cm1) is detected at a first lead (8) which is coupled with the first electrode (41), and a second signal (Cm2) is detected at a second lead (8) which is coupled with a second electrode (42). The capacity (Cf1, Cf2) of the first electrode (41) or of the second electrode (42) is determined using a predetermined calculation formula which takes the first signal (Cm1), the second signal (Cm2) and the capacitive coupling between the second electrode (4) and the first lead (8) coupled with the first electrode (41) into account.

A capacitive sensor (20) includes a capacitive sensor field (2), the capacitive sensor field (2) having a plurality of discrete electrodes (4) which are coupled to discrete leads (8). The leads (8) of a first electrode (41) are guided such that they are capacitively coupled with at least one second electrode (42). A first signal (Cm1) is detected at a first lead (8) which is coupled with the first electrode (41), and a second signal (Cm2) is detected at a second lead (8) which is coupled with a second electrode (42). The capacity (Cf1, Cf2) of the first electrode (41) or of the second electrode (42) is determined using a predetermined calculation formula which takes the first signal (Cm1), the second signal (Cm2) and the capacitive coupling between the second electrode (4) and the first lead (8) coupled with the first electrode (41) into account.

A method of manufacturing a test socket includes preparing a printed circuit board (PCB) on which a bonding pad is disposed, bonding a conductive wire on the bonding pad, mounting, on an upper surface of the PCB, a space through which the bonding pad is exposed, mounting, on an upper surface of the space, a base through which the bonding pad is exposed, mounting, on an upper surface of the base, a jig which covers the bonding pad, and injecting a liquid silicone rubber into a jig assembly by using the jig assembly as a mold, the jig assembly including the PCB, the space, the base, and the jig.

A method of manufacturing a test socket includes preparing a printed circuit board (PCB) on which a bonding pad is disposed, bonding a conductive wire on the bonding pad, mounting, on an upper surface of the PCB, a space through which the bonding pad is exposed, mounting, on an upper surface of the space, a base through which the bonding pad is exposed, mounting, on an upper surface of the base, a jig which covers the bonding pad, and injecting a liquid silicone rubber into a jig assembly by using the jig assembly as a mold, the jig assembly including the PCB, the space, the base, and the jig.

Provided is a current sensing device including an electrical conductor made of electrically conductive metal; and voltage sensing terminals provided on the electrical conductor. Each voltage sensing terminal is formed by inserting bar-like metal into a through-hole formed in the electrical conductor, and the voltage sensing terminal includes a first terminal portion that is stored in the through-hole and a second terminal portion that protrudes from the through-hole.

Testing probe and semiconductor testing fixture, and their fabrication methods are provided. A testing probe may configure a chamber through an insulating body. A first testing pin is disposed inside the chamber of the insulating body. The first testing pin includes: a first testing terminal on one end of the first testing pin and a first connection terminal on another end of the first testing pin. An elastic member is disposed inside the chamber and attached to the first testing pin to drive an upward or downward movement of the first testing pin along the chamber. A second testing pin is disposed around an outer sidewall surface of the insulating body enclosing the first testing pin. The second testing pin includes a second testing terminal on one end of the second testing pin and a second connection terminal on another end of the second testing pin.

Testing probe and semiconductor testing fixture, and their fabrication methods are provided. A testing probe may configure a chamber through an insulating body. A first testing pin is disposed inside the chamber of the insulating body. The first testing pin includes: a first testing terminal on one end of the first testing pin and a first connection terminal on another end of the first testing pin. An elastic member is disposed inside the chamber and attached to the first testing pin to drive an upward or downward movement of the first testing pin along the chamber. A second testing pin is disposed around an outer sidewall surface of the insulating body enclosing the first testing pin. The second testing pin includes a second testing terminal on one end of the second testing pin and a second connection terminal on another end of the second testing pin.

A semiconductor testing fixture is provided. The semiconductor testing fixture comprises a substrate having a surface; a plurality of testing probes formed on the surface of the substrate; and a dielectric layer filling space between adjacent testing probes and covering side surfaces of the plurality of testing probes formed on the surface of the substrate.

A semiconductor testing fixture is provided. The semiconductor testing fixture comprises a substrate having a surface; a plurality of testing probes formed on the surface of the substrate; and a dielectric layer filling space between adjacent testing probes and covering side surfaces of the plurality of testing probes formed on the surface of the substrate.