A microelectronic test device comprising an organic substrate, a probe holder, and an interposer disposed between the organic substrate and the probe holder, wherein the interposer has a coefficient of thermal expansion that is less than a coefficient of thermal expansion of the organic substrate. The interposer may effectively decouple the organic substrate from probes in the probe holder, which may substantially reduce or eliminate probe misalignment due to the coefficient of thermal expansion mismatch between the organic substrate and other components of the microelectronic test device and to provide require stiffness to the organic substrate.

Electrical properties of a semiconductor device are reproducibly and stably measured in a testing step of the semiconductor device. A probe pin includes a first plunger, a second plunger, a cleaning shaft, a first coil spring, and a second coil spring. The cleaning shaft accommodated in the inside of the first plunger is allowed to enter and exit through a tip of a contact of the first plunger by the second coil spring, thereby solder shavings attached to the tip of the contact are removed. The first plunger is electrically coupled to the second plunger by the first coil spring wound on an outer side face of the first plunger and on an outer side face of the second plunger.

Electrical properties of a semiconductor device are reproducibly and stably measured in a testing step of the semiconductor device. A probe pin includes a first plunger, a second plunger, a cleaning shaft, a first coil spring, and a second coil spring. The cleaning shaft accommodated in the inside of the first plunger is allowed to enter and exit through a tip of a contact of the first plunger by the second coil spring, thereby solder shavings attached to the tip of the contact are removed. The first plunger is electrically coupled to the second plunger by the first coil spring wound on an outer side face of the first plunger and on an outer side face of the second plunger.

A winding head includes an annular magazine for storing the quantity of wire required to wind a torus, a first mechanism for driving the magazine in rotation, and a traveler for guiding the wire, at the output of the magazine, around the torus. The winding head includes a second mechanism, distinct from the first mechanism, for driving the traveler in rotation, such that the magazine and the traveler can be driven in rotation independently of one another.

A winding head includes an annular magazine for storing the quantity of wire required to wind a torus, a first mechanism for driving the magazine in rotation, and a traveler for guiding the wire, at the output of the magazine, around the torus. The winding head includes a second mechanism, distinct from the first mechanism, for driving the traveler in rotation, such that the magazine and the traveler can be driven in rotation independently of one another.

An electric contact for preventing a terminal of an electric part and the electric contact from sticking to each other after a continuity test to improve the durability of the electric contact; and a socket for electric parts using the electric contact. The electric contact of this invention includes a first layer made from a material into which Sn melts and diffuses upon application of heat; and a second layer formed on the outer side of the first layer and made from a material lower in the rate at which Sn melts and diffuses upon application of heat than the first layer.

In one embodiment, the present invention includes an interface apparatus for semiconductor testing. The interface apparatus includes a housing. The housing includes a lower housing substrate and an upper housing substrate. The lower housing substrate has a plurality of apertures arranged according to a fine pitch, and the upper housing substrate has a plurality of apertures arranged according to a coarse pitch. A plurality of wires passes through the plurality of apertures from the lower housing substrate to the upper housing substrate. Each wire has plated conductive ends emanating from opposing sides of the housing. The plurality of apertures of the lower housing substrate corresponds to the plurality of apertures of the upper housing substrate. The interface apparatus transforms a pattern having a course pitch to a pattern having a fine pitch.

The methods and apparatus described herein are designed and configured to allow one user to test cable continuity using a wire-configurable directional connector. The methods and apparatus may transmit a first and second voltage pulse through a first and second wire of a cable under test, respectively, having a wire-configurable directional connector attached. Both voltage pulses travel through the wire-configurable directional connector. The first voltage pulse selectively leaves at least one of the second wire and a third wire of the cable under test and the second voltage pulse selectively leaves the third wire. The methods and apparatus may store a pre-determined pattern of a returning voltage pulse specific to the cable under test, and determine a state of the first, second, and third wires in response to receiving the first and second voltage pulses.

The methods and apparatus described herein are designed and configured to allow one user to test cable continuity using a wire-configurable directional connector. The methods and apparatus may transmit a first and second voltage pulse through a first and second wire of a cable under test, respectively, having a wire-configurable directional connector attached. Both voltage pulses travel through the wire-configurable directional connector. The first voltage pulse selectively leaves at least one of the second wire and a third wire of the cable under test and the second voltage pulse selectively leaves the third wire. The methods and apparatus may store a pre-determined pattern of a returning voltage pulse specific to the cable under test, and determine a state of the first, second, and third wires in response to receiving the first and second voltage pulses.

A test circuit, a test method, an array substrate and a manufacturing method thereof are provided. The test circuit includes a plurality of to-be-tested units and plurality of test electrodes connected to the to-be-tested units. The plurality of to-be-tested units are arranged in a matrix. At least one of the test electrodes is multiplexed by the plurality of to-be-tested units in a row direction and at least one of the test electrodes is multiplexed by the plurality of to-be-tested units in a column direction.