The present disclosure relates to the field of display technologies, and in particular, to a shift register circuit and a display device. The shift register circuit may include a plurality of GOAs for outputting scan signals to a plurality of pixel driving circuits and a plurality of EOAs for outputting control signals to the plurality of pixel driving circuits, where the GOAs and the EOAs are alternately arranged in a straight line.

A scan driver includes: a first transistor having a first electrode coupled to an output scan line, a second electrode coupled to a first power line, and a gate electrode coupled to a first node; a second transistor having a first electrode coupled to a first clock line, a second electrode coupled to the output scan line, and a gate electrode coupled to a second node; a third transistor having a first electrode coupled to the first node, a second electrode coupled to a first input scan line, and a gate electrode coupled to a second clock line; and a fourth transistor having a first electrode coupled to the second node and a second electrode and a gate electrode, which are coupled to a second input scan line, wherein the first input scan line and the second input scan line are different from each other.

Disclosed are a display panel and a display device. The display panel includes a display area and a non-display area surrounding the display area. The display area includes scan lines arranged in a second direction and each extending in a first direction, data lines arranged in the first direction and each extending in the second direction, and pixel driver circuits defined by the scan lines and the data lines intersecting each other, the first direction intersecting the second direction. The non-display area includes a step area and a compensation unit, and the compensation unit is located between the step area and a last row of pixel driver circuits. The compensation unit is connected to a corresponding data line and configured to transmit a leakage current compensation signal to the data line.

A display device includes a display panel including a plurality of pixels each coupled to a write scan line, a compensation scan line, an initialization scan line, a bypass scan line, and a data line; and a scan driver configured to supply i (where i is a natural number) write scan pulses, compensation scan pulses, initialization scan pulses, and bypass scan pulses to the write scan line, the compensation scan line, the initialization scan line, and the bypass scan line, respectively, during a first period corresponding to one frame period, and to supply j (where j is a natural number other than i) write scan pulses to the write scan line during each of frame periods of a second period including a plurality of consecutive frame periods.

An emission control driver includes: a plurality of stages having: a first circuit portion configured to generate a first control signal at a first node and a second control signal at a second node; a second circuit portion configured to control a voltage level of the first control signal; a third circuit portion configured to generate a third control signal based on the first control signal, the second control signal, and the second clock signal; a first output transistor configured to output a first voltage as the emission control signal in response to the first control signal; and a second output transistor configured to output a second voltage as the emission control signal, and wherein the third circuit portion comprises a first capacitor configured to maintain a substantially constant voltage between both electrodes while each of the plurality of stages outputs the emission control signal.

A display device includes: a pixel unit including a pixel connected to a data line; a data driver which supplies a sensing reference voltage to the data line during a sensing period, and supplies a data signal to the data line during a display period; and a sensing unit which receives a sensing current corresponding to the sensing reference voltage during the sensing period, and generates correction data based on the supplied sensing current. The sensing unit includes a current integrator which outputs a sensing voltage based on the sensing current input thereto through a first input terminal and based on the sensing reference voltage input thereto through a second input terminal.

A display device includes a display panel having scan lines, data lines, and sub-pixels disposed therein; a scan driver which drives the scan lines; and a data driver which drives the data lines. Each of the sub-pixels includes: a light emitting element; a driving transistor which drives the light emitting element; a 3-1th transistor electrically connected between a first node of the driving transistor and a high potential voltage; a 1-1th transistor and a 1-2th transistor each electrically connected between a second node of the driving transistor and a 1-1th or 1-2th data line, respectively; a second transistor electrically connected between a third node of the driving transistor and an initialization voltage line; a first capacitor connected between the second node and an anode electrode of the light emitting element; and a second capacitor connected between the high potential voltage and the anode electrode.

The present disclosure provides a display substrate, including a display area and a peripheral area, where N pixel unit groups are arranged in the display area, and each pixel unit group is provided with a gate line, a first reset signal line and a second reset signal line; a driving module is arranged in the peripheral area and includes at least two driving circuits, at least two operating signal line groups are further arranged in the peripheral area, the driving circuits and the operating signal line groups are alternately arranged the at least two driving circuits include a gate driving circuit and a reset driving circuit provided with N second signal output terminals the ith second signal output terminal is coupled to the second reset signal line configured for the ith pixel unit group and the first reset signal line configured for the (i+1)th pixel unit group.

Provided are a pixel circuit, a driving method thereof and a display panel. The pixel circuit includes: multiple sub-pixel circuits in an array; each sub-pixel circuit includes a first node control sub-circuit, a second node control sub-circuit, a driving sub-circuit, a storage sub-circuit, a reading sub-circuit and a light emitting device; at least reading sub-circuits of the sub-pixel circuits of some rows are controlled by a same sensing control line; the first node control sub-circuit charges the storage sub-circuit in response to a first scan signal; the second node control sub-circuit writes a reference voltage signal into a second node in response to a second scan signal; the reading sub-circuit reads a potential of the second node in response to a sensing control signal written by a sensing control line; the driving sub-circuit drives the light emitting device to emit light.

A pixel driving circuit and a driving method therefor, and a display panel and a driving method therefor are described. The pixel driving circuit includes a signal writing circuit connected to a composite signal end, a gate driving signal end, and a first node, configured to transmit a signal of the composite signal end in response to a signal of the gate driving signal end; a driving circuit; a first memory circuit connected between the first node and a second node; a second memory circuit connected between the second node and a first power supply end; a compensation circuit connected to the second node, a third node, and a control signal end; a light-emitting control circuit connected to the third node, a fourth node, and an enable signal end; and a reset circuit connected to the composite signal end, the second node, and a reset signal end.