G09G2290/00

Display panel having virtual driving units and display device

The present disclosure provides a display panel including: gate lines; data lines insulated from and intersecting with gate lines; pixel units; first and second clock signal lines; first and second power signal lines; gate driving units; and virtual driving units. Each gate driving unit has an output terminal electrically connected to gate lines, a first clock signal input terminal electrically connected to first clock signal line, and a second clock signal input terminal electrically connected to second clock signal line. Each virtual driving unit has an output terminal insulated from gate lines, a first clock signal input terminal insulated from first and second clock signal lines, and a second clock signal input terminal insulated from first and second clock signal lines. At least one virtual driving unit is disposed within the rounded angle region and located between two gate driving units.

DISPLAY PANEL AND DISPLAY DEVICE
20200126470 · 2020-04-23 ·

The present disclosure provides a display panel including: gate lines; data lines insulated from and intersecting with gate lines; pixel units; first and second clock signal lines; first and second power signal lines; gate driving units; and virtual driving units. Each gate driving unit has an output terminal electrically connected to gate lines, a first clock signal input terminal electrically connected to first clock signal line, and a second clock signal input terminal electrically connected to second clock signal line. Each virtual driving unit has an output terminal insulated from gate lines, a first clock signal input terminal insulated from first and second clock signal lines, and a second clock signal input terminal insulated from first and second clock signal lines. At least one virtual driving unit is disposed within the rounded angle region and located between two gate driving units.

DRIVER AND ELECTROOPTICAL APPARATUS
20240038124 · 2024-02-01 ·

A driver includes a first terminal, a second terminal, a control circuit, a first drive circuit, and a second drive circuit. The control circuit outputs a first pulse width signal group and a second pulse width signal group. The first drive circuit outputs a first segment drive signal to the first terminal based on a pulse width signal selected according to grayscale data. The second drive circuit outputs a second segment drive signal to the second terminal based on the pulse width signal selected according to the grayscale data. The first terminal is coupled to a first segment electrode and the second terminal is coupled to a second segment electrode.

CURVED DISPLAY DEVICE INCLUDING LAMINATED PLATES
20240153418 · 2024-05-09 ·

A display device includes a display module including a first area and a second area adjacent to the first area. At least a portion of the second area is curved with a constant degree of curvature. A flat support is disposed under the display module and overlapping the first area. A plurality of segments are disposed under the display module, overlapping the second area, and each having a structure including a plurality of laminated plates.

Driver and electrooptical apparatus
12057049 · 2024-08-06 · ·

A driver includes a first terminal, a second terminal, a control circuit, a first drive circuit, and a second drive circuit. The control circuit outputs a first pulse width signal group and a second pulse width signal group. The first drive circuit outputs a first segment drive signal to the first terminal based on a pulse width signal selected according to grayscale data. The second drive circuit outputs a second segment drive signal to the second terminal based on the pulse width signal selected according to the grayscale data. The first terminal is coupled to a first segment electrode and the second terminal is coupled to a second segment electrode.

Gate driver on array circuit

A GOA circuit includes multiple GOA circuit units, each of which includes a pull-down holding module to hold the voltage level of the second control node during the non-scanning period, so to keep the scan signal at a low voltage level. The GOA circuit unit uses a first transistor and a second transistor, operating along with a first clock signal and a second clock signal, so that a pull-down holding module continues outputting signals so to turn on the pull-down module when the scan signal is in the period that does not need to output pulses. Therefore, during the period when the scan signal does not need to output pulses, the pull-down module is still turned on and pulls down the voltage level. The present disclosure solves the problem that the pull-down holding module cannot operate continuously, and improves the stability in outputting scan signals of GOA circuit units.

Array substrate, display panel and method for detecting bent degree of the same

Embodiments of the present invention disclose an array substrate including: a flexible supporting base on which a plurality of rows of scanning lines and a plurality of columns of data lines are provided and are crossed to define a plurality of pixel units on the flexible supporting base. The flexible supporting base is further provided thereon with a plurality of rows of first signal lines and a plurality of columns of second signal lines, and conductor layers. Each of the conductor layers is located within one of at least some of the pixel units, is connected to a corresponding column of second signal line, and is configured for generating an electrical signal that is associated with a bent degree of the array substrate, and for outputting the electrical signal via the corresponding column of second signal line under driving of a signal from the first signal line. Meanwhile, a display panel and a method of detecting a bent degree of the same are disclosed.

GATE DRIVER ON ARRAY CIRCUIT
20180090087 · 2018-03-29 ·

A GOA circuit includes multiple GOA circuit units, each of which includes a pull-down holding module to hold the voltage level of the second control node during the non-scanning period, so to keep the scan signal at a low voltage level. The GOA circuit unit uses a first transistor and a second transistor, operating along with a first clock signal and a second clock signal, so that a pull-down holding module continues outputting signals so to turn on the pull-down module when the scan signal is in the period that does not need to output pulses. Therefore, during the period when the scan signal does not need to output pulses, the pull-down module is still turned on and pulls down the voltage level. The present disclosure solves the problem that the pull-down holding module cannot operate continuously, and improves the stability in outputting scan signals of GOA circuit units.