Technology that provides security for a requestor of data stored in a non-volatile memory device is disclosed. In one aspect, the non-volatile memory device provides data on a host interface only if a digest for the data matches an expected digest for the data. The non-volatile memory device may store expected digests for data for various logical addresses. Upon receiving a request on the host interface to read data for a logical address, the non-volatile memory device may access the data for the logical address, compute a digest for the accessed data, and compare the computed digest with the expected digest. The non-volatile memory device provides the accessed data on the host interface only if the computed digest matches the expected digest, in one aspect. The non-volatile memory device may be used to provide a secure boot of a host.

A layered semiconductor device capable of improving production yield and a method for producing the layered semiconductor device. The layered semiconductor device has, layered therein, a plurality of semiconductor chips, a reserve semiconductor chip which is used as a reserve for the semiconductor chips, and a control chip for controlling the operating states of the plurality of semiconductor chips and the operating state of the reserve semiconductor chip. The semiconductor chips and the reserve semiconductor chip include contactless communication units and operating switches, and are capable of contactlessly communicating with another of the semiconductor chips via the contactless communication units. The control chip controls the operating states of the semiconductor chips by switching the operating switches of the semiconductor chips, and controls the operating state of the reserve semiconductor chip by switching the operating switch of the reserve semiconductor chip.

The subject technology performs the following in a storage system including memory dies, where each memory die includes its own temperature sensor. The subject technology determines a temperature of each of the memory dies based on a temperature reading from each memory die's temperature sensor. The subject technology determines whether data is hot data or cold data, where hot data is more likely to be changed after it is written than cold data. In response to determining that the data is hot data, the subject technology stores the data in a memory die with a relatively higher temperature than another one of the memory dies. Further, in response to determining that the data is cold data, the subject technology stores the data in a memory die with a relatively cooler temperature than another one of the memory dies.

A solid-state drive device is provided. The solid-state drive device includes a housing, a first circuit board, and a second circuit board. The housing includes a first side and a second side. The first side is opposite to the second side. At least one first ventilation hole is formed on the first side. At least one second ventilation hole is formed on the second side. The first circuit board is disposed in the housing. The second circuit board is disposed in the housing. The second circuit board is coupled to the first circuit board. A gap is formed between the first circuit board and the second circuit board. The first ventilation hole and the second ventilation hole correspond to the gap.

A solid-state drive device is provided. The solid-state drive device includes a housing, a first circuit board, and a second circuit board. The housing includes a first side and a second side. The first side is opposite to the second side. At least one first ventilation hole is formed on the first side. At least one second ventilation hole is formed on the second side. The first circuit board is disposed in the housing. The second circuit board is disposed in the housing. The second circuit board is coupled to the first circuit board. A gap is formed between the first circuit board and the second circuit board. The first ventilation hole and the second ventilation hole correspond to the gap.

According to one embodiment, a memory system, such as a SDIO card, includes a nonvolatile semiconductor memory device, a control section, a memory, an extended function section, and an extension register. The extended function section is controlled by the control section. A first command reads data from the extension register in units of given data lengths. A second command writes data to the extension register in units of given data lengths. A extension register includes a first area, and second area different from the first area, information configured to specify a type of the extended function and controllable driver, and address information indicating a place to which the extended function is assigned, the place being on the extension register, are recorded in the first area, and the second area includes the extended function.

According to one embodiment, a memory system, such as a SDIO card, includes a nonvolatile semiconductor memory device, a control section, a memory, an extended function section, and an extension register. The extended function section is controlled by the control section. A first command reads data from the extension register in units of given data lengths. A second command writes data to the extension register in units of given data lengths. A extension register includes a first area, and second area different from the first area, information configured to specify a type of the extended function and controllable driver, and address information indicating a place to which the extended function is assigned, the place being on the extension register, are recorded in the first area, and the second area includes the extended function.

A load control device may include a semiconductor switch, a control circuit, and first and second terminals adapted to be coupled to a remote device. The load control device may include a first switching circuit coupled to the second terminal, and a second switching circuit coupled between the first terminal and the second terminal. The control circuit may be configured to render the first switching circuit conductive to conduct a charging current from an AC power source to a power supply of the remote device during a first time period of a half-cycle of the AC power source, and further configured to render the first and second switching circuits conductive and non-conductive to communicate with the remote device via the second terminal during a second time period of the half-cycle of the AC power source.

Methods for termination of signal lines within a memory system include appointing a particular memory device of a plurality of memory devices to act as a termination device during a memory device operation on a memory device of the plurality of memory devices corresponding to a particular address of the memory system, wherein appointing the particular memory device to act as a termination device comprises storing termination information in the particular memory device corresponding to the particular address.

Methods for termination of signal lines within a memory system include appointing a particular memory device of a plurality of memory devices to act as a termination device during a memory device operation on a memory device of the plurality of memory devices corresponding to a particular address of the memory system, wherein appointing the particular memory device to act as a termination device comprises storing termination information in the particular memory device corresponding to the particular address.