An apparatus, vision processing unit, and method are provided for clustering motion events in a content addressable memory. A motion event is received including coordinates in an image frame that have experienced a change and a timestamp of the change. A determination is made as to whether determine whether there is a valid entry in the memory having coordinates within a predefined range of coordinates included in the motion event. In response to a determination that there is the valid entry having the coordinates within the predefined range of coordinates included in the motion event, write to the valid entry the coordinates and the timestamp in the motion event.

An apparatus, vision processing unit, and method are provided for clustering motion events in a content addressable memory. A motion event is received including coordinates in an image frame that have experienced a change and a timestamp of the change. A determination is made as to whether determine whether there is a valid entry in the memory having coordinates within a predefined range of coordinates included in the motion event. In response to a determination that there is the valid entry having the coordinates within the predefined range of coordinates included in the motion event, write to the valid entry the coordinates and the timestamp in the motion event.

A two-port ternary content addressable memory (TCAM) and layout pattern thereof, and associated memory device are provided. The two-port TCAM may include a first storage unit, a second storage unit, a set of first search terminals, a set of second search terminals, a first comparison circuit, a second comparison circuit, a first match terminal and a second match terminal, wherein the first comparison circuit is respectively coupled to the first storage unit, the second storage unit, the set of first search terminals and the first match terminal, and the second comparison circuit is respectively coupled to the first storage unit, the second storage unit, the set of second search terminals and the second match terminal. First search data and second search data may be concurrently inputted into the two-port TCAM for determining whether the first search data and the second search data match content data within the two-port TCAM.

A two-port ternary content addressable memory (TCAM) and layout pattern thereof, and associated memory device are provided. The two-port TCAM may include a first storage unit, a second storage unit, a set of first search terminals, a set of second search terminals, a first comparison circuit, a second comparison circuit, a first match terminal and a second match terminal, wherein the first comparison circuit is respectively coupled to the first storage unit, the second storage unit, the set of first search terminals and the first match terminal, and the second comparison circuit is respectively coupled to the first storage unit, the second storage unit, the set of second search terminals and the second match terminal. First search data and second search data may be concurrently inputted into the two-port TCAM for determining whether the first search data and the second search data match content data within the two-port TCAM.

A search circuit includes a content-addressable memory (CAM) including a plurality of CAM cells configured to store a plurality of entry data, each entry data including a first bit corresponding to a least significant bit through a K-th bit corresponding to a most significant bit, the CAM configured to provide a plurality of matching signals indicating whether each of the plurality of entry data matches searching data, and a CAM controller configured to perform a partial searching operation such that the CAM controller applies comparison bits corresponding to a portion of the first through K-th bits as the searching data to the CAM and searches for target entry data among the plurality of entry data based on the plurality of matching signals indicating that the corresponding bits of the target entry data match the comparison bits.

System and method for supporting intra- and inter-subnet address resolution in a network environment using the same linear forwarding tale (LFT) for both the intra- and inter-subnet forwarding. Subnet prefix values in global route headers (GRHs) are used for linear forwarding table (LFT) lookup in a high performance computing environments. An exemplary can provide for use of an Inter Subnet Route Number (ISRN) embedded in the subnet prefix values in the GRHs for LFT lookup in a network switch environment in a high performance computing environment such as a network having an InfiniBand (IB) architecture. A method can provide, at a computer environment, including a network fabric, one or more subnets, each of which subnets are associated with one or more network switches or hosts. The system and method is compatible with legacy switches and nodes that are not conversant with the ISRNs.

System and method for supporting intra- and inter-subnet address resolution in a network environment using the same linear forwarding tale (LFT) for both the intra- and inter-subnet forwarding. Subnet prefix values in global route headers (GRHs) are used for linear forwarding table (LFT) lookup in a high performance computing environments. An exemplary can provide for use of an Inter Subnet Route Number (ISRN) embedded in the subnet prefix values in the GRHs for LFT lookup in a network switch environment in a high performance computing environment such as a network having an InfiniBand (IB) architecture. A method can provide, at a computer environment, including a network fabric, one or more subnets, each of which subnets are associated with one or more network switches or hosts. The system and method is compatible with legacy switches and nodes that are not conversant with the ISRNs.

A ternary content addressable memory device (TCAM) may include: a cache memory storing a look-up table with respect to a calculation result of a plurality of functions; an approximation unit configured to generate mask bits; and a controller configured to obtain an approximation input value corresponding to an input key based on the mask bits and to retrieve an output value corresponding to the obtained approximation input value from the look-up table.

A ternary content addressable memory device (TCAM) may include: a cache memory storing a look-up table with respect to a calculation result of a plurality of functions; an approximation unit configured to generate mask bits; and a controller configured to obtain an approximation input value corresponding to an input key based on the mask bits and to retrieve an output value corresponding to the obtained approximation input value from the look-up table.

A ternary content addressable memory unit includes a first inverter, a second inverter, a third inverter, a fourth inverter, a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, and an eighth transistor. The first inverter includes an input terminal, and an output terminal coupled to a first node. The second inverter includes an input terminal coupled to the first node and an output terminal coupled to the input terminal of the first inverter. The third inverter includes an input terminal coupled to a second node and an output terminal. The fourth inverter includes an input terminal coupled to the output terminal of the third inverter and an output terminal coupled to the second node.