The disclosure provides a novel system and method of storing multi-bit information, including providing a nano-channel-based polymer memory device, the device having at least one memory cell comprising at least two addition nano-channels, each of the addition nano-channels arranged to add a unique chemical construct (or codes) to the polymer when the polymer enters the respective addition nano-channel, the polymer having a bead or origami on a non-writing end of the polymer; each nano-channel having a nano-port constriction having a port width which allows the polymer to pass through the nano-port, and does not allow the bead or origami to pass through and does not allow addition or deblocking enzymes (or beads attached thereto) to pass through the nano-port; successively steering the polymer through the nanopore into the addition nano-channels to add the codes to the polymer based on a predetermined digital data pattern to create the digital data pattern on the polymer.

The disclosure provides a novel system and method of storing multi-bit information, including providing a nano-channel-based polymer memory device, the device having at least one memory cell comprising at least two addition nano-channels, each of the addition nano-channels arranged to add a unique chemical construct (or codes) to the polymer when the polymer enters the respective addition nano-channel, the polymer having a bead or origami on a non-writing end of the polymer; each nano-channel having a nano-port constriction having a port width which allows the polymer to pass through the nano-port, and does not allow the bead or origami to pass through and does not allow addition or deblocking enzymes (or beads attached thereto) to pass through the nano-port; successively steering the polymer through the nanopore into the addition nano-channels to add the codes to the polymer based on a predetermined digital data pattern to create the digital data pattern on the polymer.

A storage device of an embodiment includes a first conductive layer; a second conductive layer; a fluid layer between the first conductive layer and the second conductive layer; particles in the fluid layer; a first control electrode between the first conductive layer and the second conductive layer; a first insulating layer between the first conductive layer and the first control electrode surrounding the fluid layer; and a second insulating layer between the first control electrode and the second conductive layer surrounding the fluid layer. In this storage device, a first cross-sectional area of the fluid layer in a first cross-section perpendicular to a first direction is smaller than a second cross-sectional area of the fluid layer in a second cross-section perpendicular to the first direction. The first cross-section includes the first control electrode, and the second cross-section includes the second insulating layer.

Data storage is provided using double-stranded nucleic acid molecules provided on a thermal control device comprising a plurality of sites and temperature control circuitry to independently control a temperature of each of the plurality of sites. The temperature control circuitry, controls the site temperatures to provide a different temperature at a target site compared to other sites of the plurality of sites. The different temperatures at the target site and the other sites provide a greater probability of a read or write operation acting on the target site compared to the other sites. The temperature-based addressing helps to increase physical storage density.

Data storage is provided using double-stranded nucleic acid molecules provided on a thermal control device comprising a plurality of sites and temperature control circuitry to independently control a temperature of each of the plurality of sites. The temperature control circuitry, controls the site temperatures to provide a different temperature at a target site compared to other sites of the plurality of sites. The different temperatures at the target site and the other sites provide a greater probability of a read or write operation acting on the target site compared to the other sites. The temperature-based addressing helps to increase physical storage density.

Data storage is provided using double-stranded nucleic acid molecules provided on a thermal control device comprising a plurality of sites and temperature control circuitry to independently control a temperature of each of the plurality of sites. The temperature control circuitry, controls the site temperatures to provide a different temperature at a target site compared to other sites of the plurality of sites. The different temperatures at the target site and the other sites provide a greater probability of a read or write operation acting on the target site compared to the other sites. The temperature-based addressing helps to increase physical storage density.

A system and method of storing and reading digital data, including providing a nanopore polymer memory (NPM) device having at least one memory cell comprising at least two addition chambers each arranged to add a unique chemical construct (or codes) to a polymer (or DNA) string when the polymer enters the respective addition chamber, the data comprising a series of codes; successively steering the polymer from deblock chambers through the nanopore into the addition chambers to add codes to the polymer to create the digital data pattern on the polymer; and accurately controlling the bit rate of the polymer using a servo controller. The device may have loading chamber(s) to load (or remove) the polymer into/from the deblock chambers through at least one micro-hole. The cell may be part of a memory system that stores and retrieves raw data and allows for remote retrieval and conversion. The cell may store multi-bit data having a plurality of states for the codes.

A system and method of storing and reading digital data, including providing a nanopore polymer memory (NPM) device having at least one memory cell comprising at least two addition chambers each arranged to add a unique chemical construct (or codes) to a polymer (or DNA) string when the polymer enters the respective addition chamber, the data comprising a series of codes; successively steering the polymer from deblock chambers through the nanopore into the addition chambers to add codes to the polymer to create the digital data pattern on the polymer; and accurately controlling the bit rate of the polymer using a servo controller. The device may have loading chamber(s) to load (or remove) the polymer into/from the deblock chambers through at least one micro-hole. The cell may be part of a memory system that stores and retrieves raw data and allows for remote retrieval and conversion. The cell may store multi-bit data having a plurality of states for the codes.

A system and method of storing and reading digital data, including providing a nanopore polymer memory (NPM) device having at least one memory cell comprising at least two addition chambers each arranged to add a unique chemical construct (or codes) to a polymer (or DNA) string when the polymer enters the respective addition chamber, the data comprising a series of codes; successively steering the polymer from deblock chambers through the nanopore into the addition chambers to add codes to the polymer to create the digital data pattern on the polymer; and accurately controlling the bit rate of the polymer using a servo controller. The device may have loading chamber(s) to load (or remove) the polymer into/from the deblock chambers through at least one micro-hole. The cell may be part of a memory system that stores and retrieves raw data and allows for remote retrieval and conversion. The cell may store multi-bit data having a plurality of states for the codes.

A memory device having: a first local digit line configured to extend in a first direction; a second local digit line configured in parallel with the first local digit line; a plurality of unit cells stacked in the first direction and sandwiched between the first local digit line and the second local digit line, each respective unit cell among the plurality of unit cells configured to connect the first local digit line to the second local digit line in a second direction that is perpendicular to the first direction, the respective unit cell having a transistor and a memory cell; and a plurality of wordlines configured to extend in a third direction that is perpendicular to the first direction and the second direction, where transistors in the plurality of unit cells are connected to the wordlines.