Patent classifications
H01G7/00
Methods and apparatuses for use in tuning reactance in a circuit device
Methods and apparatuses for use in tuning reactance are described. Open loop and closed loop control for tuning of reactances are also described. Tunable inductors and/or tunable capacitors may be used in filters, resonant circuits, matching networks, and phase shifters. Ability to control inductance and/or capacitance in a circuit leads to flexibility in operation of the circuit, since the circuit may be tuned to operate under a range of different operating frequencies.
Vacuum variable capacitor
A vacuum variable capacitor includes a pre-vacuum enclosure for reducing a pressure differential across the bellows. The vacuum force load on the drive system can thereby be reduced, allowing faster movement of the movable electrode, faster capacitance adjustment of the vacuum variable capacitor and longer lifetimes of the device.
Devices and methods for improving voltage handling and/or bi-directionality of stacks of elements when connected between terminals
Devices and methods for improving voltage handling and/or bi-directionality of stacks of elements when connected between terminals are described. Such devices and method include use of symmetrical compensation capacitances, symmetrical series capacitors, or symmetrical sizing of the elements of the stack.
Devices and methods for improving voltage handling and/or bi-directionality of stacks of elements when connected between terminals
Devices and methods for improving voltage handling and/or bi-directionality of stacks of elements when connected between terminals are described. Such devices and method include use of symmetrical compensation capacitances, symmetrical series capacitors, or symmetrical sizing of the elements of the stack.
GAIN CALIBRATION FOR AN IMAGING SYSTEM
An imaging system includes an array of photodetectors and electronic circuitry associated with the photodetectors to read intensity values from the photodetectors. The electronic circuitry can include an integrator with an integrator capacitor having a nominal capacitance, wherein a gain of the electronic circuitry associated with a photodetector can depend at least in part on the actual capacitance of the integrator capacitor, the actual capacitance differing from the nominal capacitance. The imaging system can be configured to determine a gain factor that depends at least in part on the actual capacitance and/or a signal voltage input to the integrator. The imaging system can be configured to apply the gain factor based at least in part on the actual capacitance of the integrator capacitor calculated. The imaging system can be a thermal imaging system and may include an infrared camera core.
GAIN CALIBRATION FOR AN IMAGING SYSTEM
An imaging system includes an array of photodetectors and electronic circuitry associated with the photodetectors to read intensity values from the photodetectors. The electronic circuitry can include an integrator with an integrator capacitor having a nominal capacitance, wherein a gain of the electronic circuitry associated with a photodetector can depend at least in part on the actual capacitance of the integrator capacitor, the actual capacitance differing from the nominal capacitance. The imaging system can be configured to determine a gain factor that depends at least in part on the actual capacitance and/or a signal voltage input to the integrator. The imaging system can be configured to apply the gain factor based at least in part on the actual capacitance of the integrator capacitor calculated. The imaging system can be a thermal imaging system and may include an infrared camera core.
Devices and Methods for Improving Voltage Handling and/or Bi-Directionality of Stacks of Elements when Connected Between Terminals
Devices and methods for improving voltage handling and/or bi-directionality of stacks of elements when connected between terminals are described. Such devices and method include use of symmetrical compensation capacitances, symmetrical series capacitors, or symmetrical sizing of the elements of the stack.
Devices and Methods for Improving Voltage Handling and/or Bi-Directionality of Stacks of Elements when Connected Between Terminals
Devices and methods for improving voltage handling and/or bi-directionality of stacks of elements when connected between terminals are described. Such devices and method include use of symmetrical compensation capacitances, symmetrical series capacitors, or symmetrical sizing of the elements of the stack.
Apparatus and methods for high voltage variable capacitor arrays with body biasing resistors
Apparatus and methods for high voltage variable capacitors are provided herein. In certain configurations, an integrated circuit (IC) includes a variable capacitor array and a bias voltage generation circuit that biases the variable capacitor array to control the array's capacitance. The variable capacitor array includes a plurality of variable capacitor cells electrically connected in parallel between a radio frequency (RF) input and an RF output of the IC. Additionally, each of the variable capacitor cells can include a cascade of two or more pairs of anti-series metal oxide semiconductor (MOS) capacitors between the RF input and the RF output. The pairs of anti-series MOS capacitors include a first MOS capacitor and a second MOS capacitor electrically connected in anti-series. The bias voltage generation circuit generates bias voltages for biasing the MOS capacitors of the variable capacitor cells.
Apparatus and methods for high voltage variable capacitor arrays with body biasing resistors
Apparatus and methods for high voltage variable capacitors are provided herein. In certain configurations, an integrated circuit (IC) includes a variable capacitor array and a bias voltage generation circuit that biases the variable capacitor array to control the array's capacitance. The variable capacitor array includes a plurality of variable capacitor cells electrically connected in parallel between a radio frequency (RF) input and an RF output of the IC. Additionally, each of the variable capacitor cells can include a cascade of two or more pairs of anti-series metal oxide semiconductor (MOS) capacitors between the RF input and the RF output. The pairs of anti-series MOS capacitors include a first MOS capacitor and a second MOS capacitor electrically connected in anti-series. The bias voltage generation circuit generates bias voltages for biasing the MOS capacitors of the variable capacitor cells.