A composite electronic component includes a multilayer capacitor; a tantalum capacitor; a lead frame disposed between the multilayer capacitor and the tantalum capacitor and electrically connecting the multilayer capacitor and the tantalum capacitor to each other; and an encapsulation member encapsulating the multilayer capacitor and the tantalum capacitor so that a portion of the lead frame is exposed.

An integrated circuit (IC) includes a substrate and a first capacitor on the substrate. The first capacitor has a first width. A first dielectric layer is provided on a side of the first capacitor opposite the substrate. Further, a second capacitor is present on a side of the first dielectric layer opposite the first capacitor. The second capacitor has a second width that is smaller than the first width. The IC also has a second dielectric layer and a first metal layer. The second dielectric layer is on a side of the second capacitor opposite the first dielectric layer. The first metal layer is on a side of the second dielectric layer opposite the second capacitor.

An integrated circuit (IC) includes a substrate and a first capacitor on the substrate. The first capacitor has a first width. A first dielectric layer is provided on a side of the first capacitor opposite the substrate. Further, a second capacitor is present on a side of the first dielectric layer opposite the first capacitor. The second capacitor has a second width that is smaller than the first width. The IC also has a second dielectric layer and a first metal layer. The second dielectric layer is on a side of the second capacitor opposite the first dielectric layer. The first metal layer is on a side of the second dielectric layer opposite the second capacitor.

An integrated circuit (IC) includes a substrate and a first capacitor on the substrate. The first capacitor has a first width. A first dielectric layer is provided on a side of the first capacitor opposite the substrate. Further, a second capacitor is present on a side of the first dielectric layer opposite the first capacitor. The second capacitor has a second width that is smaller than the first width. The IC also has a second dielectric layer and a first metal layer. The second dielectric layer is on a side of the second capacitor opposite the first dielectric layer. The first metal layer is on a side of the second dielectric layer opposite the second capacitor.

An integrated circuit (IC) includes a substrate and a first capacitor on the substrate. The first capacitor has a first width. A first dielectric layer is provided on a side of the first capacitor opposite the substrate. Further, a second capacitor is present on a side of the first dielectric layer opposite the first capacitor. The second capacitor has a second width that is smaller than the first width. The IC also has a second dielectric layer and a first metal layer. The second dielectric layer is on a side of the second capacitor opposite the first dielectric layer. The first metal layer is on a side of the second dielectric layer opposite the second capacitor.

A design method applied to a capacitor array is provided. The capacitor array includes multiple preset capacitor units, and each preset capacitor includes multiple unit capacitors. The method includes: acquiring unit simulation models of the preset capacitor units; acquiring a first simulation model of the capacitor array based on an arrangement manner of the preset capacitor units in the capacitor array and the unit simulation models of the preset capacitor unit; acquiring an arrangement direction of the preset capacitor units based on the arrangement manner, establishing a parasitic resistance equivalent test structure of a group of preset capacitor units in the same arrangement direction; obtaining a parasitic resistance of each preset capacitor unit based on the parasitic resistance equivalent test structure; and establishing a second simulation model representing the capacitor array based on the parasitic resistance of each preset capacitor unit and the first simulation model.

Compositions and methods for creating in situ capacitors, micro-capacitors, battery like applications, and chipless memory chips are provided. The methods and compositions all comprise the use of magnetically-alignable particles. In various applications herein the particles may be nonconductive, in another aspect, the particles are conductive. The functional capacitors entail the ferromagnetic particles and a dielectric material or a non-conductive coating.

According to one embodiment, an electronic device includes a power-supply voltage input terminal, a first capacitor, and a second capacitor. The first capacitor has a fixed capacitance. The second capacitor has a variable capacitance. The first capacitor and the second capacitor are connected in parallel to the power-supply voltage input terminal.

An electrical system, and, more particularly, to an electrical system for an aircraft comprising one or more energy sinks and a hybrid energy storage system. The hybrid energy storage system may comprise one or more primary energy sources, a secondary energy source, and a secondary energy source control unit. The one or more primary energy sources may be coupled to and supply power to the one or more energy sinks. The secondary energy source may be coupled to the one or more primary energy sources and adapted to supply power at a variable output voltage to the one or more primary energy sources.

A variable capacitor is disclosed. The variable capacitor includes a multi-layer ceramic capacitor member, and a capacitance varying mechanism. The multi-layer ceramic capacitor member includes one or two external electrode(s), a ceramic dielectric, and a plurality of electrode layers positioned inside the ceramic dielectric. The capacitance varying mechanism includes an electrical conductor positioned aside and approximate to the ceramic dielectric. The electrical conductor is deformable responsive to a pressure applied thereon, and an area of the electrical conductor in contact with the ceramic dielectric varies in accordance with the pressure, thus varying a capacitance value between the external electrode(s) and the electrical conductor. In general, the external electrode(s) of the multi-layer ceramic capacitor member serve(s) as fixed electrode(s) of the variable capacitor.