Patent classifications
H01L21/00
Display device comprising plurality of light emitting elements overlapping with contact electrodes
A method for repairing a display device, the display device including a plurality of inorganic light emitting elements arranged in a matrix and an insulator arranged around the plurality of inorganic light emitting elements, the method comprising steps of: detecting a defective inorganic light emitting element as the inorganic light emitting element having a defect; removing the insulator around the defective inorganic light emitting element while the defective inorganic light emitting element remains without being removed by irradiating the insulator around the defective inorganic light emitting element with irradiation light; and removing the defective inorganic light emitting element after the insulator therearound has been removed.
Display device, method for manufacturing the same, and electronic device
A liquid crystal display device with a high aperture ratio is provided. A liquid crystal display device with low power consumption is provided. A display device includes a transistor and a capacitor. The transistor includes a first insulating layer, a first semiconductor layer in contact with the first insulating layer, a second insulating layer in contact with the first semiconductor layer, and a first conductive layer electrically connected to the first semiconductor layer via an opening portion provided in the second insulating layer. The capacitor includes a second conductive layer in contact with the first insulating layer, the second insulating layer in contact with the second conductive layer, and the first conductive layer in contact with the second insulating layer. The second conductive layer includes a composition similar to that of the first semiconductor layer. The first conductive layer and the second conductive layer are configured to transmit visible light.
Through-substrate waveguide
Embodiments may relate to a semiconductor package that includes a die and a package substrate. The package substrate may include one or more cavities that go through the package substrate from a first side of the package substrate that faces the die to a second side of the package substrate opposite the first side. The semiconductor package may further include a waveguide communicatively coupled with the die. The waveguide may extend through one of the one or more cavities such that the waveguide protrudes from the second side of the package substrate. Other embodiments may be described or claimed.
Angular velocity sensor and sensor element
In an angular velocity sensor, a pair of support parts are separated from each other in an x-axis direction in an orthogonal coordinate system xyz. A main part extends along the x-axis. A pair of extension parts connect two ends of the main part and inner sides of the support parts. The driving arms extend from the main part alongside each other in a y-axis direction separated from each other in the x-axis direction. The detecting arm extends from the main part in the y-axis direction at a position which is between the pair of driving arms. The driving circuit supplies voltages so that the pair of driving arms vibrate so as to bend to inverse sides from each other in the x-axis direction. The detecting circuit detects the signal generated due to bending deformation of the detecting arm in the z-axis direction.
Semiconductor device and method for fabricating the same
A method for fabricating semiconductor device includes the steps of first providing a substrate having a fin-shaped structure thereon, forming a single diffusion break (SDB) structure in the substrate to divide the fin-shaped structure into a first portion and a second portion, and then forming more than one gate structures such as a first gate structure and a second gate structure on the SDB structure. Preferably, each of the first gate structure and the second gate structure overlaps the fin-shaped structure and the SDB structure.
Method of manufacturing display apparatus
A method of manufacturing a display apparatus includes: forming a display element layer above a lower substrate, where the display element layer includes first to third display elements; forming an encapsulation layer on the display element layer; forming first partition walls on the encapsulation layer to define first to third color regions, where the first to third color regions overlap the first to third display elements, respectively, in a view in a direction perpendicular to the lower substrate; forming second partition walls on the first partition walls; forming a quantum dot layer, which includes forming a second color quantum dot layer in the second color region and forming a third color quantum dot layer in the third color region; and removing the second partition walls.
Current flow between a plurality of semiconductor chips
A semiconductor device is provided, which includes a semiconductor chip; a first current input/output portion that is electrically connected to the semiconductor chip; a second current input/output portion that is electrically connected to the semiconductor chip; three or more conducting portions provided with the semiconductor chip, between the first current input/output portion and the second current input/output portion; and a current path portion having a path through which current is conducted to each of the three or more conducting portions, wherein the current path portion includes a plurality of slits.
Ingan epitaxy layer and preparation method thereof
Provided are a method for preparing an InGaN-based epitaxial layer on a Si substrate (12), as well as a silicon-based InGaN epitaxial layer prepared by the method. The method may include the steps of: 1) directly growing a first InGaN-based layer (11) on a Si substrate (12); and 2) growing a second InGaN-based layer on the first InGaN-based layer (11).
MRAM device having self-aligned shunting layer
Various embodiments of the present disclosure are directed towards a memory device including a shunting layer overlying a spin orbit torque (SOT) layer. A magnetic tunnel junction (MTJ) structure overlies a semiconductor substrate. The MTJ structure includes a free layer, a reference layer, and a tunnel barrier layer disposed between the free and reference layers. A bottom electrode via (BEVA) underlies the MTJ structure, where the BEVA is laterally offset from the MTJ structure by a lateral distance. The SOT layer is disposed vertically between the BEVA and the MTJ structure, where the SOT layer continuously extends along the lateral distance. The shunting layer extends across an upper surface of the SOT layer and extends across at least a portion of the lateral distance.
Superconductor structure with normal metal connection to a resistor and method of making the same
A method of forming a superconductor structure is disclosed. The method comprises forming a superconductor line in a first dielectric layer, forming a resistor with an end coupled to an end of the superconductor line, and forming a second dielectric layer overlying the resistor. The method further comprises etching a tapered opening through the second dielectric layer to the resistor, and performing a contact material fill with a normal metal material to fill the tapered opening and form a normal metal connector coupled to the resistor.