The present disclosure relates to the field of display technologies, and discloses a display panel, a preparing method thereof, and a display device. The display panel has a bending area, and the display panel includes a sensing component; the sensing component includes a differential bridge connection circuit composed of a first strain sensor, a second strain sensor, a third strain sensor, and a fourth strain sensor; the first strain sensor, the second strain sensor, the third strain sensor, and the fourth strain sensor are resistance transducers, and are located in the bending area; the first strain sensor and the fourth strain sensor constitute first opposite bridge arms; the second strain sensor and the third strain sensor constitute second opposite bridge arms, and the first opposite bridge arms and the second opposite bridge arms are separately located on two sides of a neutral layer of the display panel.

The present disclosure relates to the field of display technologies, and discloses a display panel, a preparing method thereof, and a display device. The display panel has a bending area, and the display panel includes a sensing component; the sensing component includes a differential bridge connection circuit composed of a first strain sensor, a second strain sensor, a third strain sensor, and a fourth strain sensor; the first strain sensor, the second strain sensor, the third strain sensor, and the fourth strain sensor are resistance transducers, and are located in the bending area; the first strain sensor and the fourth strain sensor constitute first opposite bridge arms; the second strain sensor and the third strain sensor constitute second opposite bridge arms, and the first opposite bridge arms and the second opposite bridge arms are separately located on two sides of a neutral layer of the display panel.

A solid-state imaging device having a backside illuminated structure, includes: a pixel region in which pixels each having a photoelectric conversion portion and a plurality of pixel transistors are arranged in a two-dimensional matrix; an element isolation region isolating the pixels which is provided in the pixel region and which includes a semiconductor layer provided in a trench by an epitaxial growth; and a light receiving surface at a rear surface side of a semiconductor substrate which is opposite to a multilayer wiring layer.

The present disclosure provides a display device comprising: a first thin film transistor including a first semiconductor pattern disposed on a substrate and comprising poly-silicon, and a first gate electrode; a middle layer on the first gate electrode; a second thin film transistor including a second semiconductor pattern disposed on the middle layer and comprising an oxide semiconductor, and a second gate electrode; and a storage capacitor including first to fourth storage electrodes overlapping with each other.

A display apparatus includes a base substrate including a display area in which an image is displayed and a peripheral area adjacent to the display area, a source/drain pattern on the base substrate, the source/drain pattern including a connecting electrode in a pad portion of the peripheral area and a electrode of a thin film transistor in the display area, a planarization insulation layer on the base substrate, the planarization insulation layer contacting a side surface of the connecting electrode and a side surface of the electrode of the thin film transistor, and exposing a top surface of the connecting electrode, a connecting member contacting the connecting electrode, and a driving member including a driving circuit, the driving member being connected to the connecting member.

A method of manufacturing an anti-fuse device includes forming an anti-fuse structure on a substrate, forming a first transistor at a first position away from the anti-fuse device in a first direction, and forming a second transistor at a second position away from the anti-fuse device in a second direction opposite the first direction. Forming the anti-fuse structure includes forming first and second S/D structures in an active area, the first transistor includes the first S/D structure, and the second transistor includes the second S/D structure. The method includes constructing a first electrical connection between gate structures of the first and second transistors and a second electrical connection between a third S/D structure of the first transistor and a fourth S/D structure of the second transistor.

Various embodiments of the present disclosure are directed towards a semiconductor device. The semiconductor device comprises a source region and a drain region in a substrate and laterally spaced. A gate stack is over the substrate and between the source region and the drain region. The drain region includes two or more first doped regions having a first doping type in the substrate. The drain region further includes one or more second doped regions in the substrate. The first doped regions have a greater concentration of first doping type dopants than the second doped regions, and each of the second doped regions is disposed laterally between two neighboring first doped regions.

[Object] Provided is an electronic apparatus capable of Preventing image Quality deterioration of an image captured by a camera while reducing a bezel width.

[Solving Means] An electronic apparatus according to the present disclosure includes a display unit disposed on a first surface, a first imaging unit disposed on the side opposite to a display surface of the display unit, and a second imaging unit disposed on a second surface on the side opposite to the first surface. Sensitivity of the first imaging unit to a first wavelength band that includes blue light is higher than sensitivity of the second imaging unit to the first wavelength band. In addition, a ratio of blue light detection pixels in a pixel array of the first imaging unit may be higher than a ratio of blue light detection pixels in a pixel array of the second imaging unit.

A display device includes a substrate including a display area and a peripheral area disposed around the display area. The peripheral area includes a bending region and a contact region adjacent to the bending region. A first connection line includes a first portion disposed in the contact region, and a second portion disposed in both the bending region and the contact region, and including a first layer and a second layer. At least part of the second layer of the second portion overlaps the first layer of the second portion. In the contact region, the first layer of the second portion is electrically connected to the first portion, and the second layer of the second portion is electrically connected to the first layer of the second portion.

Provided are a solid-state imaging apparatus, a method for manufacturing a solid-state imaging apparatus, and an electronic apparatus equipped with a solid-state imaging apparatus that can reduce the size of a semiconductor chip in such a way that one semiconductor substrate having a logic circuit controls two sensors. Provided is a solid-state imaging apparatus including a first sensor, a first semiconductor substrate having a memory, a second semiconductor substrate having a logic circuit, and a second sensor, in which the first sensor, the first semiconductor substrate, the second semiconductor substrate, and the second sensor are arranged in this order.