A light emitting device is provided. The light emitting device includes a substrate and a plurality of light emitting elements. The light emitting elements are electrically connected on the substrate, each having a light emitting surface. A light-transmissive member is arranged on the light emitting elements and a light-reflective member covers a lateral surface of the light emitting elements and a lateral surface of the light-transmissive member. The plurality of light emitting elements include a plurality of first light emitting elements and a second light emitting element that has an area of the light emitting surface smaller than that of each of the first light emitting elements. The second light emitting element is arranged between the first light emitting elements.

A semiconductor device with a novel structure is provided. The semiconductor device includes a silicon substrate including a first circuit, a first element layer including a second circuit, and a second element layer including a third circuit. The first circuit includes a first transistor. The second circuit includes a second transistor. The third circuit includes a memory cell. The memory cell includes a third transistor and a capacitor. The first element layer and the second element layer constitute a stacked block stacked and provided in a direction perpendicular or substantially perpendicular to a surface of the silicon substrate. A plurality of stacked blocks are stacked and provided in the direction perpendicular or substantially perpendicular to the surface of the silicon substrate. Each of the plurality of stacked blocks includes a first wiring provided in the direction perpendicular or substantially perpendicular to the surface of the silicon substrate. The plurality of stacked blocks are electrically connected to each other through the wiring.

An imaging device according to embodiments of the present disclosure includes: a first semiconductor substrate provided with a photoelectric conversion element, floating diffusion that temporarily holds a charge output from the photoelectric conversion element, and a transfer transistor that transfers the charge output from the photoelectric conversion element to the floating diffusion; and a second semiconductor substrate provided on the first semiconductor substrate via a first interlayer insulating film and provided with a readout circuit unit that reads out the charge held in the floating diffusion and outputs a pixel signal.

A semiconductor device comprises a first chip including a first semiconductor substrate, a first semiconductor element on the first semiconductor substrate, a first wiring layer to be connected to the first semiconductor element, and a first pad to be connected to the first wiring layer, and a second chip including a second semiconductor substrate, a second semiconductor element on the second semiconductor substrate, a second wiring layer to be connected to the second semiconductor element, and a second pad to be connected to the second wiring layer and joined to the first pad. At least one of the first pad and the second pad includes a first metal layer to be joined to the other pad, a second metal layer having a coefficient of thermal expansion higher than that of the first metal layer, and a barrier metal layer between the first metal layer and the second metal layer.

The present disclosure relates to a display substrate and a method for manufacturing the same. The display substrate includes: a substrate; a first electrode located on the substrate; and a conductive convex located on the first electrode. A dimension of a cross section of the conductive convex along a plane parallel to the substrate is negatively correlated to a distance from the cross section to a surface of the first electrode.

Memory devices might include control circuitry that, when checking for a match of a stored digit of data and a received digit of data, might be configured to cause the memory device to apply a first voltage level to a control gate of a first memory cell of a memory cell pair, apply a second voltage level different than the first voltage level to a control gate of a second memory cell of that memory cell pair, determine whether that memory cell pair is deemed to be activated or deactivated in response to applying the first and second voltage levels, and deem a match between the stored digit of data and a received digit of data in response, in part, to whether that memory cell pair is deemed to be deactivated.

Memory devices might include control circuitry that, when checking for a match of a stored digit of data and a received digit of data, might be configured to cause the memory device to apply a first voltage level to a control gate of a first memory cell of a memory cell pair, apply a second voltage level different than the first voltage level to a control gate of a second memory cell of that memory cell pair, determine whether that memory cell pair is deemed to be activated or deactivated in response to applying the first and second voltage levels, and deem a match between the stored digit of data and a received digit of data in response, in part, to whether that memory cell pair is deemed to be deactivated.

Disclosed is a method of preparing a thin film transistor substrate, a thin film transistor substrate, and a display apparatus. The method includes forming a conductive material layer, forming a hydrophobic insulation layer on the conductive material layer, forming a photoresist layer on the hydrophobic insulation layer, patterning the photoresist layer to form a photoresist pattern, removing a segment in the hydrophobic insulation layer that is not covered by the photoresist pattern to form a hydrophobic insulation pattern, and removing a segment in the conductive material layer that is not covered by the hydrophobic insulation pattern to form a conductive pattern.

An image sensor includes a plurality of pixel sensing portions arranged in m columns and n rows. Each of the pixel sensing portions includes at least one thin film transistor and a photodetection diode (13) including n-type (16), intrinsic (15) and p-type (14) semiconductor layers. The p-type semiconductor layer (14) includes a multi-layered structure including lower (142) and upper (141) p-type semiconductor layered portions. The upper p-type semiconductor layered portion (141) has a band gap greater than 1.7 eV and has a p-type dopant in an amount not less than two times of that of the lower p-type semiconductor layered portion (142). An image sensing-enabled display apparatus and a method of making the image sensor are also disclosed.

An apparatus, comprising at least one vessel having a bottom and at least one sidewall extending from the bottom, wherein the at least one sidewall encloses an interior of the at least one vessel, a shaft has a proximal end and a distal end, wherein the distal end of the shaft extends into the interior of the at least one vessel, wherein the proximal end of the shaft is coupled to a motor, at least one support structure which extends laterally from the shaft; and a substrate attachment fixture on a distal end of the at least one support structure, wherein the at least one support structure and the substrate attachment fixture are within the interior of the at least one vessel.