A transistor includes (i) a first wire including a semiconducting component configured to operate in an on state at temperatures above a semiconducting threshold temperature and (ii) a second wire including a superconducting component configured to operate in a superconducting state while: a temperature of the superconducting component is below a superconducting threshold temperature and a first input current supplied to the superconducting component is below a current threshold. The semiconducting component is located adjacent to the superconducting component. In response to a first input voltage, the semiconducting component is configured to generate an electromagnetic field sufficient to lower the current threshold such that the first input current exceeds the lowered current threshold.

An integrated circuit structure comprises a first dielectric layer disposed above a substrate. The integrated circuit structure comprises an interconnect structure comprising a first interconnect on a first metal layer, a second interconnect on a second metal layer, and a via connecting the first interconnect and the second interconnect, the first interconnect being on or within the first dielectric layer. A metal-insulator-metal (MIM) capacitor is formed in or on the first dielectric layer in the first metal layer adjacent to the interconnect structure. The MIM capacitor comprises a bottom electrode plate comprising a first low resistivity material, an insulator stack on the bottom electrode plate, the insulator stack comprising at least one of an etch stop layer and a high-K dielectric layer; and a top electrode plate on the insulator stack, the top electrode plate comprising a second low resistivity material.

A photovoltaic cell array and a photovoltaic module are provided. The photovoltaic cell array includes multiple solar cells and a flexible metal conductive strip. Each of an upper surface and a lower surface of each solar cell is arranged with a segment electrode. In adjacent two solar cells which are respectively referred to as a first solar cell and a second solar cell, the segment electrode on the lower surface of the first solar cell is connected with the segment electrode on the upper surface of the second solar cell by the flexible metal conductive strip. The photovoltaic cell array has a stack structure in a normal direction of the upper surface of the solar cell, and a connection region at which the segment electrode is connected with the flexible metal conductive strip is located outside an overlapped region of the stack structure.

A multijunction solar cell includes an InGaAs buffer layer and an InGaAlAs grading interlayer disposed below, and adjacent to, the InGaAs buffer layer. The grading interlayer achieves a transition in lattice constant from one solar subcell to another solar subcell.

A semiconductor device having a highly doped quantum structure emitter is disclosed. In an embodiment, the semiconductor device includes a quantum structure emitter. The quantum structure emitter includes of a first layer made of an undoped semiconductor material with a large band gap, a second, middle, highly doped layer made of a semiconductor material with a low band gap and a third, undoped layer made of a semiconductor material with a large band gap.

A light receiving device includes: a photoelectric conversion layer that includes a first compound semiconductor, and absorbs a wavelength in an infrared region to generate electrical charges; a plurality of contact layers that include a second compound semiconductor, and are provided on the photoelectric conversion layer at spacing intervals with respect to one another; and a covering layer that is formed to cover a portion corresponding to the spacing intervals of a front surface of the photoelectric conversion layer and side surfaces of the respective contact layers, and includes a Group IV semiconductor.

An image sensor includes a plurality of pixel sensing portions arranged in m columns and n rows. Each of the pixel sensing portions includes at least one thin film transistor and a photodetection diode (13) including n-type (16), intrinsic (15) and p-type (14) semiconductor layers. The p-type semiconductor layer (14) includes a multi-layered structure including lower (142) and upper (141) p-type semiconductor layered portions. The upper p-type semiconductor layered portion (141) has a band gap greater than 1.7 eV and has a p-type dopant in an amount not less than two times of that of the lower p-type semiconductor layered portion (142). An image sensing-enabled display apparatus and a method of making the image sensor are also disclosed.

Provided is an opto-electronic device including a semiconductor substrate doped with a first conductivity type impurity, a source region and a drain region provided on the semiconductor substrate spaced apart from each other and doped with a second conductivity type impurity which is electrically opposite to the first conductivity type impurity, a first electrode and a second electrode electrically connected to the source region and the drain region, respectively, a quantum dot layer provided between the source region and the drain region on the semiconductor substrate and including quantum dots, a first insulation layer configured to insulate the semiconductor substrate and the quantum dot layer from each other, and a transparent electrode layer provided on the quantum dot layer.

Reflective bank structures for light emitting devices are described. The reflective bank structure may include a substrate, an insulating layer on the substrate, and an array of bank openings in the insulating layer with each bank opening including a bottom surface and sidewalls. A reflective layer spans sidewalls of each of the bank openings in the insulating layer.

A method for forming electrical contacts for a solar cell and a solar cell formed using the method is provided. The method includes forming a first metal layer over predefined portions of a surface of the solar cell; depositing a carbon nanotube layer over the first metal layer; and forming a second metal layer over the carbon nanotube layer, wherein the first metal layer, the carbon nanotube layer, and the second metal layer form a first metal matrix composite layer that provides electrical conductivity and mechanical support for the metal contacts.