A wafer test machine is disclosed. The wafer test machine comprises a main body having a chamber defined therein, wherein a probe card is disposed at an upper portion of the chamber; a chuck for fixing a wafer in the chamber; a moving unit for moving the chuck in the chamber, thus making a contact between the probe card and the wafer; and a laser cleaning apparatus for cleaning the probe card in the chamber using a laser beam, when the probe card does not contact the wafer.

A sensing structure is presented for use in testing integrated circuits on a substrate. The sensing structure includes a probe region corresponding to a conductive region for connecting to the integrated circuit. A first sensing region at least partially surrounds the probe region. A plurality of sensing elements connects in series such that a first of the plurality of sensing elements has two terminals respectively connected to the first sensing region and the probe region. And a second of the plurality of sensing elements has two terminals respectively connected to the probe region and a first reference potential.

A multi-layer eddy current probe has a large number of flat spiral coils which are arranged in different coil layers of a multi-layer arrangement, wherein a respective insulating layer which is composed of electrically insulating material is arranged between adjacent coil layers of the multi-layer arrangement. Each of the flat coils has an inner terminal and an outer terminal. Selected terminals of selected flat coils of different coil layers are electrically connected to one another by way of vias. The flat coils form at least one coil group which has at least three flat coils which are arranged one above the other in different layers, wherein the inner terminals of the at least three flat coils of the coil group are electrically conductively connected by means of a common inner via.

A stack including doped semiconductor strips, a one-dimensional array of gate electrode strips, and a dielectric matrix layer is formed over a substrate. A two-dimensional array of openings is formed through the dielectric matrix layer and the one-dimensional array of gate electrode strips. A two-dimensional array of tubular gate electrode portions is formed in the two-dimensional array of openings. Each of the tubular gate electrode portions is formed directly on a respective one of the gate electrode strips. Gate dielectrics are formed on inner sidewalls of the tubular gate electrode portions. Vertical semiconductor channels are formed within each of the gate dielectrics by deposition of a semiconductor material. A two-dimensional array of vertical field effect transistors including surrounding gate electrodes is formed.

A current sensor includes a first current pathway, a first magnetic sensor arranged near the first current pathway, a second magnetic sensor arranged opposite the first magnetic sensor with the first current pathway in between, a second current pathway, a third magnetic sensor arranged near the second current pathway, a fourth magnetic sensor arranged opposite the third magnetic sensor with the second current pathway in between, and a signal processor that generates a signal based on a quantity of the first measured current from output of the first magnetic sensor and output of the second magnetic sensor, and also generates a signal based on a quantity of the second measured current from output of the third magnetic sensor and output of the fourth magnetic sensor.

A test probe tip can include a resistive element coupled with a tip component. The resistive element can include a resistive layer disposed on an exterior surface of a structural member of the resistive impedance element. In embodiments, the resistive element can be configured to form a structural component of the test probe tip without an insulating covering applied thereto. Additional embodiments may be described and/or claimed herein.

A magnetic detection apparatus includes a Hall device configured to include terminals and to generate an electromotive force based on a magnetic field, a Hall output controller configured to control an output of the Hall device such that an output phase alteration order of a first section of the output is symmetrical to an output phase alteration order of a second section of the output on the basis of half cycle of a control cycle of the Hall device, an amplifier configured to be connected to output terminals of the Hall device to amplify the output of the Hall device, and an amplifier output controller configured to control an output polarity of the amplifier based on the output of the Hall device.

An object of the present invention is to provide a film formation technique having high productivity by realizing a foundation layer having excellent crystallinity with a small film thickness of about 2 m. An embodiment of the present invention relates to a film forming method which includes the step of forming a buffer layer by sputtering on a sapphire substrate held by a substrate holder. The buffer layer includes an epitaxial film having a wurtzite structure prepared by adding at least one substance selected from the group consisting of C, Si, Ge, Mg, Zn, Mn, and Cr to Al.sub.xGa.sub.1xN (where 0x1).

A system for detecting a position of a dual solenoid device includes device configured to move between first and second positions, and a controller. The controller has first and second monitoring circuits in operable communication with first and second channels, respectively. The first and second channels are in operable communication with first and second solenoids, respectively. Each solenoid is configured to selectively operate as an active solenoid to move the device when the solenoid and its respective channel are in an active mode, and as a passive solenoid when the solenoid and its respective channel are in a passive mode to passively move with the active solenoid. Each of the monitoring circuits is configured to determine a position of the device when the channel the monitoring circuit is associated with is operating in the passive mode by monitoring an electrical parameter of the passive solenoid associated with that channel.

To provide a current sensor excellent in insulation resistance. A current sensor (1) includes a conductor (10); a support part (30) for supporting a signal processing IC (20); a magnetoelectric conversion element (13) configured to be electrically connectable to the signal processing IC (20), and arranged in a gap (10a) of the conductor (10) so as to detect a magnetic field generated by a current flowing through the conductor (10); and an insulation member (14) supporting the magnetoelectric conversion element (13).