H01P3/00

MAGNETIC LAYER CHARACTERIZATION SYSTEM AND METHOD
20220299474 · 2022-09-22 ·

In a method of testing a multilayer structure containing a magnetic layer, one or more network parameters are measured of a waveguide that is electromagnetically coupled with the multilayer structure as a function of frequency and as a function of a magnetic field applied to the multilayer structure during the measuring of the network parameters. Based on the measured one or more network parameters, at least one magnetic property of the magnetic layer of the multilayer structure is determined. The network parameters in some embodiments are S-parameters. The at least one magnetic property may include an effective anisotropy field of the magnetic layer and/or a damping constant of the magnetic layer.

Josephson traveling wave parametric amplifier
20220094320 · 2022-03-24 ·

According to an example aspect of the present invention, there is provided a travelling wave parametric amplifier comprising a waveguide transmission line comprising therein at least ten Josephson elements, wherein each of the at least ten Josephson element comprises a loop, with exactly one Josephson junction of first size on one half of the loop and at least two Josephson junctions of a second size on a second half of the loop, the second size being larger than the first size, a flux bias line configured to generate a magnetic flux threading each of the at least one loop, and a set of resistors coupled with the flux bias line.

Single layer radio frequency integrated circuit package and related low loss grounded coplanar transmission line

A novel and useful a single layer RFIC/MMIC structure including a package and related redistribution layer (RDL) based low loss grounded coplanar transmission line. The structure includes a package molded around an RF circuit die with a single redistribution layer (RDL) fabricated on the surface thereof mounted on an RF printed circuit board (PCB) via a plurality of solder balls. Coplanar transmission lines are fabricated on the RDL to conduct RF output signals from the die to PCB signal solder balls. The signal trace transition to the solder balls are funnel shaped to minimize insertion loss and maximize RF isolation between channels. A conductive ground shield is fabricated on the single RDL and operative to shield the plurality of coplanar transmission lines. The ground shield is electrically connected to a ground plane on the PCB via a plurality of ground solder balls arranged to surround the plurality of coplanar RF transmission lines and signal solder balls, and are operative to couple the ground shield to the ground plane on the PCB and provide an electrical return path for the plurality of coplanar transmission lines. Ground vias on the printed circuit board can be either located under the ground solder balls or between them.

VACUUM CELL WITH INTEGRATED GUIDE STACK WALL
20220084709 · 2022-03-17 ·

An ultra-high-vacuum (UHV) cell includes an integrated guide stack (IGS) as part of a boundary between an internal vacuum and an external ambient. The IGS is formed by bonding together plural integrated guide components (IGCs). Each IGC includes (prior to the bonding) electrical and/or electro-magnetic (EM) guides defined within a bulk material such as glass or silicon. The electrical guides can be, for example, conductive paths or vias, while the EM guides can include microwave or other RF guides, optical fibers and/or paths along which an index of refraction has been modified along an desired optical path. EM and electrical connections between IGCs can be formed after the IGCs are bonded together to form the IGS. Use of an IGS as a vacuum boundary can provide substantial functionality for manipulating and interrogating quantum particles; the functionality can include, for example, the ability to regulate fields within the UHV cell.

Systems and processes for increasing semiconductor device reliability

A system configured to increase a reliability of electrical connections in a device. The system including a lead configured to electrically connect a pad of at least one support structure to a pad of at least one electrical component. The lead includes an upper portion that includes a lower surface arranged on a lower surface thereof. The lower surface of the upper portion is arranged vertically above a first upper surface of a first pad connection portion; and the lower surface of the upper portion is arranged vertically above a second upper surface of the second pad connection portion. A process configured to increase a reliability of electrical connections in a device is also disclosed.

System for coherent microwave transmission using a non-refrigerated waveguide

An apparatus, including a waveguide, a first circuit, a second circuit. The waveguide is connected to the first circuit and the second circuit. The first circuit is located within a cryostat.

TRANSMISSION LINE AND ELECTRONIC DEVICE
20220077556 · 2022-03-10 ·

A transmission line includes first, second, third, and fourth signal lines, and first, second, third, and fourth electrode pads respectively connected thereto. A first main surface of an external connection portion includes a first region in which the first electrode pad and the second electrode pad are provided, and a second region in which the third electrode pad and the fourth electrode pad are provided. Each of the first electrode pad and the second electrode pad, in a plan view, is surrounded by a ground electrode, and at least one of the third electrode pad and the fourth electrode pad, in the plan view, includes a portion that is not surrounded by the ground electrode.

Transmission line and antenna module

A transmission line (12) includes a multilayer substrate (20), a signal pattern line (30), a ground pattern conductor (50), and an intermediate ground pattern conductor (40) that is arranged between the signal pattern line (30) and the ground pattern conductor (50) and that is electrically connected to the ground pattern conductor (50). The signal pattern line (30) has a first connection point (30c) to which a signal conductor extending in a laminating direction of the multilayer substrate (20) is connected. A first cavity portion (41h) is formed in the intermediate ground pattern conductor (40) at a position overlapped with a first end portion (30a) of the signal pattern line (30) in a plan view of the multilayer substrate (20). A first end edge (41e) of the first cavity portion (41h) has a first overlapping portion (41a) overlapped with the signal pattern line (30).

TRANSMISSION LINE SUBSTRATE AND ELECTRONIC DEVICE

A transmission line substrate includes a line portion, a base including a first main surface and a second main surface opposite to the first main surface, first and second ground conductors, and a signal line. The first ground conductor is on the first main surface side. The second ground conductor is on the second main surface side. The first ground conductor includes first conductor-non-formed portions overlapping the signal line when viewed in the Z axis direction. The second ground conductor includes second conductor-non-formed portions overlapping the signal line when viewed in the Z axis direction. A total area of the second conductor-non-formed portions is less than a total area of the first conductor-non-formed portions.

SEMICONDUCTOR DEVICE PACKAGE AND METHOD OF MANUFACTURING THE SAME
20220068774 · 2022-03-03 · ·

A semiconductor device package includes a substrate and a conductive lid. The conductive lid is disposed within the substrate. The conductive lid defines a waveguide having a cavity. The waveguide is configured to transmit a signal from a first electronic component to a second electronic component through the cavity.