Circuitry detects properties of an accessory removably connected thereto via a multi-pole connector. The circuitry has first, second and third circuit terminals for coupling to respective first, second, and third poles of said connector, and has an output for providing evaluation values from which properties of the accessory may be derived. In the circuitry, first current sourcing circuitry is coupled to said first circuit terminal for providing a first current. A switch network comprises first, second, third and fourth switch network terminals, said first switch network terminal coupled to a reference potential, said second switch network terminal coupled to said second circuit terminal, and said third switch network terminal coupled to said third circuit terminal. Comparator circuitry provides a comparison signal, its first input terminal being coupled to said first circuit terminal. Second current sourcing circuitry having a monitor node coupled to said second comparator input terminal and an output node coupled to said fourth switch network terminal provides a second current to said switch network. At least one of said first current sourcing circuitry and said second current-sourcing circuitry is responsive to a digital control word for varying said first or said second current. Control logic is provided for operatively controlling the state of the interconnections of said switch network, for adjusting said digital control word in response to said comparison signal until a voltage at said first circuit terminal is equal to a voltage at said monitor node, and for supplying said adjusted digital control word associated with the state of the interconnections to said output as an evaluation value.

A communication system includes an outer housing, an inner housing, and a hanger plate assembly. The outer housing has first and second side walls. The inner housing is at least partially positioned within the outer housing. The inner housing has first and second side walls and is configured to receive a plurality of patch panel devices therein in a stacked arrangement. The hanger plate assembly includes a first hanger plate hingedly coupled to the first side wall of the inner housing and a plurality of hangers connected to the first hanger plate in a stacked arrangement. Each hanger is adapted to support a cable thereon. The hanger plate assembly has a stored condition in which the hanger plate assembly is fully positioned within the outer housing, and a pulled out condition in which the hanger plate assembly is at least partially positioned outside the outer housing

A jack detector detects a combination state between a socket including a detecting pin and a first signal pin and a jack. The jack detector includes a first current source for supplying a first detecting current, a second current source for supplying a second detecting current larger than the first detecting current, and a buffer for generating a detecting signal in accordance with a detecting pin voltage input from the detecting pin. The second current source instead of the first current source is connected to the detecting pin in synchronization with a combination starting point when the detecting pin and the first signal pin are electrically connected to each other and it is determined that the jack is combined with the socket when the detecting signal is maintained at a state of the combination starting point.

A jack detector detects a combination state between a socket including a detecting pin and a first signal pin and a jack. The jack detector includes a first current source for supplying a first detecting current, a second current source for supplying a second detecting current larger than the first detecting current, and a buffer for generating a detecting signal in accordance with a detecting pin voltage input from the detecting pin. The second current source instead of the first current source is connected to the detecting pin in synchronization with a combination starting point when the detecting pin and the first signal pin are electrically connected to each other and it is determined that the jack is combined with the socket when the detecting signal is maintained at a state of the combination starting point.

Technologies are generally described for a pocket junction box system. In an example, a pocket junction box is configured to fit inside a meter collar. The pocket junction box includes a first set of electrical terminals on a rear surface of the pocket junction box for interfacing with wire leads inside the meter collar, and a second set of electrical terminals on a front surface of the pocket junction box for interfacing with field wire leads outside the meter collar. The pocket junction box may further include at least one current transducer and at least one microprocessor for monitoring the power flow through the pocket junction box. A front casing is attached to the front surface of the pocket junction box and connected to the second set of electrical terminals. The front casing may include a communications circuit board for communicating with a meter data management system.

A plug-on neutral (PON) device includes a housing that defines a phase cooperation portion configured to physically cooperate with phase buses of a bus assembly. The phase cooperation portion is configured to be electrically isolated from the phase buses and stabilize the PON device when installed on the bus assembly. A neutral cooperation portion is configured to physically cooperate with the neutral bus and to physically stabilize the PON device when installed. An electrical connector disposed at the neutral cooperation portion is configured to electrically connect to the neutral bus at an external end and to electrically connect to a conductive current path at its internal end. A lug assembly has one or more conductive terminal lugs, each terminal lug configured to receive current from an external neutral source via an aperture in the lug end of the housing and to electrically connect to the current path.

An uninterruptible power supply device that includes a housing having a rectangular parallelepiped shape, a plurality of power conversion units, and a bus unit for connecting the plurality of power conversion units in parallel to each other. The plurality of power conversion units are stacked in a vertical direction and housed in the housing. The bus unit is arranged in the housing to face a rear surface of the housing. The bus unit includes a plurality of buses extending in the vertical direction, at least one support member that supports the plurality of buses such that the plurality of buses are spaced apart from each other in a horizontal direction, and at least one fixing member that removably fixes each support member to the housing.

An audio control circuit receives analog audio signals and digital audio signals via an audio signal input interface. The audio control circuit includes an audio codec chip, a first control circuit, a first switch circuit, a second control circuit, and a second switch circuit. The first control circuit obtains the analog audio signals from the audio signal input interface and converts the analog audio signals into first control signals to control the first switch circuit turned on and off. The second control circuit obtains the digital audio signals from the audio signal input interface and converts the digital audio signals into second control signals to control the second switch circuit turned on and off. The audio codec chip receives the analog audio signals in response to the first switch turned on and receives the digital audio signals in response to the second switch turned on.

This application relates to digital-to-analogue conversion with improved noise performance. Embodiments relate to digital-to-analogue conversion circuits (300) for converting a digital audio signal to an analogue audio signal having a digital-to-analogue converter (104) operable at a plurality of DAC clock rates. A first clock controller (301-1) controls the DAC clock rate based on an indication of the amplitude of the audio signal. The DAC clock rate (CK.sub.1) may be increased for low amplitude signal, where noise is important, to reduce the in-band thermal noise of the DAC. At higher amplitudes, when noise is less audible, the DAC clock rate may be reduced to avoid distortion. The amplitude of the audio signal may be monitored by a digital level detector (302) or in some cases by an analogue level detector (303). The DAC may be an oversampling DAC with an input interpolator (101) The conversion circuit may also include a word-length reduction module (102) and a dynamic error matching module (103) whose clock rates may also be varied based on the signal.

A control box for a generator set, including a support structure configured to be mounted to a rail. The support structure can include a first planar panel configured to be mounted to the rail, and a second planar panel offset from the first planar panel and configured to be mounted to the rail. The control box can also include a top cover configured to be connected to the first planar panel and the second planar panel and to cover a top portion of the support structure, a first side cover configured to be connected to the first planar panel and the second planar panel and substantially perpendicular to the top cover, and a second side cover configured to be offset from the first side cover and configured to be connected to the first planar panel and the second planar panel.