An AC-DC converter may include three phase terminals, two DC terminals, a first converter stage to convert between an AC current at the phase terminals and a first DC current at the first and second intermediate nodes, a second converter stage operable to convert between a first DC signal at third and fourth intermediate nodes and a second DC signal at the DC terminals, a first filter stage comprising a capacitor network having a star-point, a DC link connecting the first intermediate node to the third intermediate node and the second intermediate node to the fourth intermediate node. The second converter stage includes a middle voltage node between the DC terminals and a boost circuit having a midpoint node at the same electrical potential as the middle voltage node. The DC link includes a common mode filter having a common mode capacitor connecting the middle voltage node to the star-point.

An improved power converter produces power through a power switch in response to an activation signal that has an on-time and a switching frequency. An on-time signal has a constant on-time and controls the on-time of the activation signal. An error signal indicates that the switching frequency is not equal to a reference frequency. A step up signal and a step down signal are based on the error signal. A count signal is increased in response to the step up signal and decreased in response to the step down signal. An on-time pulse has a duration that is related to a value of the count signal. The on-time pulse controls the constant on-time of the on-time signal and maintains the switching frequency at about the reference frequency.

A method of protecting a converter of a wind turbine and a respective protection system are provided. The converter is coupled to a generator of the wind turbine to perform conversion of electrical power produced by the generator, the converter including plural semiconductor components that are operational to provide the conversion of the electrical power. The method includes the performing of a step of estimating a junction temperature of at least one of the semiconductor components by determining a current in the converter associated with power loss in one or more of the semiconductor components; estimating power loss associated with the one or more semiconductor components based on the determined current and on a state of the one or more semiconductor components; and using a thermal model to estimate the junction temperature of the semiconductor components based on the estimated power loss. The estimating step is repeatedly performed.

A cascaded multilevel converter is disclosed. The converter comprises a plurality of modules coupled to form a branch, each of the modules comprising a switching circuit and a DC link for supplying DC voltage to the switching circuit. The converter further comprises a controller for controlling the switching circuit of each module to generate an AC voltage in the branch, wherein the controller is configured to: determine for each module a voltage across a capacitor of the DC link of the module, determine for each module a reference power value for charging the capacitor of the DC link of the module to a reference voltage value for the module, determine, from the reference power values of the modules, a common reference AC current value for AC current in the branch, determine, from the common reference AC current value, a common reference AC voltage value for AC voltage in the branch.

A switched-mode power supply for use in an intralogistics system for goods has a housing with a first power output with a first operating voltage for first electrical consumers. The housing of the switched-mode power supply has at least a second power output with a second operating voltage for second electrical consumers. The second operating voltage at the second power output is greater than the first operating voltage at the first power output.

An isolated resonant conversion control apparatus includes a voltage and current obtaining unit configured to obtain an output voltage and an output current of an output-side switch transistor of an isolated resonant conversion unit, and a processing unit configured to calculate a switching frequency of an input-side switch transistor of the isolated resonant conversion unit based on the output voltage and the output current, obtain a turn-on offset time and a turn-off offset time of the output-side switch transistor relative to the input-side switch transistor based on the switching frequency of the input-side switch transistor, obtain a duty ratio of a second driving signal based on a duty ratio of a first driving signal, the turn-on offset time, and the turn-off offset time, and generate the second driving signal based on the switching frequency and the duty ratio of the second driving signal.

Various examples are provided related to switching methods for regulating resonant switched-capacitor converters (RSCCs). In one example, a method includes operating switches of the RSCC in a repeated asymmetric sequence of switching states per switching cycle. The repeated asymmetric sequence can include at least three switching states selected from five defined switching states including an idle state. For example, repeated asymmetric sequence can consist of four switching states selected from the five defined switching states. In another example, a method includes operating switches of the RSCC in a repeated sequence of switching states per switching cycle. The repeated sequence can include six switching states selected from five defined switching states with at least one of the five defined switching states occurs twice in the six switching states. For example, the repeated sequence can consist of each of the five defined switching states with the idle state occurring twice.

A power converter for converting an input voltage at an input of the power converter into an output voltage at an output of the power converter may include a switching node, a power inductor coupled between the switching node and the output, a flying capacitor having a first flying capacitor terminal and a second flying capacitor terminal, a pump capacitor having a first pump capacitor terminal and a second pump capacitor terminal, the second pump capacitor terminal coupled to ground, a first switch coupled between the input and the first flying capacitor terminal, a second switch coupled between the first flying capacitor terminal and the switching node, a third switch coupled between the second flying capacitor terminal and the switching node, a fourth switch coupled between the second flying capacitor terminal and a ground voltage, a fifth switch coupled between the second flying capacitor terminal and the first pump capacitor terminal, and a sixth switch coupled between the output and the first pump capacitor terminal.

A voltage regulator receives a reference voltage and generates a regulated voltage using a MOSFET having a gate terminal configured to receive a control voltage. A charge pump receives the regulated voltage and generates a charge pump voltage in response to an enable signal and a clock signal generated in response to the enable signal. The voltage regulator further includes a first switched capacitor circuit coupled to the gate terminal and configured to selectively charge a first capacitor with a first current and impose a first voltage drop on the control voltage in response to assertion of the enable signal. The voltage regulator also includes a second switched capacitor circuit coupled to the gate terminal and configured to selectively charge a second capacitor with a second current and impose a second voltage drop on the control voltage in response to one logic state of the clock signal.

A multi-rail power converter assembly includes first and second interleaved power converters configured to output first and second rail currents. A control driver circuit includes first and second control outputs configured to output first and second control signals configured to control power conversion in the first and second power converters to generate the first and second rail currents. A first PWM generator receives a compensator control signal and generates the first control signal based on the compensator control signal. A second PWM generator receives a first modified compensator control signal and generates the second control signal based on the first modified compensator control signal. The control driver circuit is configured to generate the first modified compensator control signal based on an average of the first rail current and the second rail current.