There is disclosed herein clock generation circuitry, in particular rotary travelling wave oscillator circuitry. Such circuitry comprises a pair of signal lines connected together to form a dosed loop and arranged such that they define at least one transition section where both said lines in a first portion of the pair cross from one lateral side of both said lines in a second portion of the pair to the other lateral side of both said lines in the second portion of the pair.

A circuit device includes an oscillation circuit which is electrically coupled to a first node to electrically be coupled to one end of a resonator and a second node to electrically be coupled to another end of the resonator, and is configured to oscillate the resonator to generate an oscillation signal, and a waveform shaping circuit which is coupled to the first node, to which the oscillation signal is input from the first node, and which is configured to output a clock signal obtained by performing waveform shaping on the oscillation signal, and a duty adjustment circuit configured to supply the first node with a bias voltage which is variably adjusted based on adjustment data to thereby adjust a duty ratio of the clock signal.

A circuit device includes an oscillation circuit which is electrically coupled to a first node to electrically be coupled to one end of a resonator and a second node to electrically be coupled to another end of the resonator, and is configured to oscillate the resonator to generate an oscillation signal, and a waveform shaping circuit which is coupled to the first node, to which the oscillation signal is input from the first node, and which is configured to output a clock signal obtained by performing waveform shaping on the oscillation signal, and a duty adjustment circuit configured to supply the first node with a bias voltage which is variably adjusted based on adjustment data to thereby adjust a duty ratio of the clock signal.

A circuit device includes an oscillation circuit configured to oscillate a resonator to thereby generate an oscillation signal, a waveform shaping circuit to which the oscillation signal is input, and which is configured to output a clock signal obtained by performing waveform shaping on the oscillation signal, a first duty adjustment circuit configured to perform a duty adjustment of the clock signal, and an output buffer circuit configured to output a first output clock signal and a second output clock signal to an outside based on the clock signal. The output buffer circuit includes a second duty adjustment circuit configured to perform a duty adjustment of the second output clock signal.

A circuit device includes an oscillation circuit configured to oscillate a resonator to thereby generate an oscillation signal, a waveform shaping circuit to which the oscillation signal is input, and which is configured to output a clock signal obtained by performing waveform shaping on the oscillation signal, a first duty adjustment circuit configured to perform a duty adjustment of the clock signal, and an output buffer circuit configured to output a first output clock signal and a second output clock signal to an outside based on the clock signal. The output buffer circuit includes a second duty adjustment circuit configured to perform a duty adjustment of the second output clock signal.

The present disclosure relates to an oscillator apparatus comprising a differential transmission line forming a closed loop, a plurality of active core components that are electrically connected to the differential transmission line and that are configured to compensate for loss in the differential transmission line, a plurality of tuning elements that are electrically coupled with the differential transmission line, and a processor configured to control each tuning element of the plurality of tuning elements to activate or deactivate such that an effective electrical length of the differential transmission line is changed.

The present disclosure relates to an oscillator apparatus comprising a differential transmission line forming a closed loop, a plurality of active core components that are electrically connected to the differential transmission line and that are configured to compensate for loss in the differential transmission line, a plurality of tuning elements that are electrically coupled with the differential transmission line, and a processor configured to control each tuning element of the plurality of tuning elements to activate or deactivate such that an effective electrical length of the differential transmission line is changed.

An oscillator calibration circuit is presented. The oscillator calibration includes a first frequency locking circuit (FLC) coupled to a first oscillator, wherein the first FLC calibrates the frequency of the first oscillator using an over-the-air reference signal, wherein the first FLC calibrates the first oscillator prior to a data transmission session and remains free running during the data transmission session; and a second FLC coupled to a second oscillator, wherein the second FLC calibrates the frequency of the second oscillator using the over-the-air reference signal, wherein the second FLC calibrates the second oscillator immediately prior to a data transmission session and remains free running during the data transmission session.

An oscillator calibration circuit is presented. The oscillator calibration includes a first frequency locking circuit (FLC) coupled to a first oscillator, wherein the first FLC calibrates the frequency of the first oscillator using an over-the-air reference signal, wherein the first FLC calibrates the first oscillator prior to a data transmission session and remains free running during the data transmission session; and a second FLC coupled to a second oscillator, wherein the second FLC calibrates the frequency of the second oscillator using the over-the-air reference signal, wherein the second FLC calibrates the second oscillator immediately prior to a data transmission session and remains free running during the data transmission session.

Accordingly the embodiments herein provide a method for fabricating a neuron oscillator (200a). The neuron oscillator (200a) includes a thermal insulating device connected with a resistor and a capacitor in series to produce self-sustained oscillations, where the resistor and the capacitor are arranged in parallel manner. The neuron oscillator (200a) eliminates a requirement of an additional compensation circuitry for a consistent performance over a time under heating issues. Additionally, an ON/OFF ratio of the neuron oscillator (200a) improves to a broader resistor range. Further, a presence of tunable synaptic memristor functionality of the neuron oscillator (200a) provides a reduced fabrication complexity to a large scale ONN. An input voltage required for the neuron oscillator (200a) is low (2-3 V) which makes it suitable to use with existing circuitries without using any additional converters. Additionally, an amplitude of the oscillations is a significant fraction of an applied bias which eliminates a need for an amplification.