Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a network entity may transmit a signal generated using a mixer, wherein the signal is subject to local oscillator (LO) leakage in connection with the generation using the mixer. The network entity may transmit an LO leakage estimate indicator based at least in part on the LO leakage of the signal in connection with the generation using the mixer. Numerous other aspects are described.

A FMCW radar receiver includes a LO providing a chirped LO signal, an in-phase (I) channel for outputting I-data and a quadrature (Q) channel for outputting Q-data. A dynamic correction parameter generator generates IQ phase correction values (P[n]s) and IQ gain correction values (G[n]s) based on a frequency slope rate of the chirped LO signal for generating during intervals of chirps including a first sequence of P[n]s and G[n]s during a first chirp and a second sequence of P[n]s and G[n]s during a second chirp. An IQ mismatch (IQMM) correction circuit has a first IQMM input coupled to receive the I-data and a second IQMM input receiving the Q-data, and the P[n]s and G[n]s. During the first chirp the IQMM correction circuit provides first Q′-data and first I′-data and during the second chirp the IQMM correction circuit provides at least second Q′-data and second I′-data.

There is provided a demodulator that makes it possible to reduce or avoid deterioration in demodulation performance due to nonlinearity of input amplitude-frequency characteristics of a variable capacitive element included in an analog control signal input section of a frequency variable oscillator, while suppressing an influence of noise. The demodulator includes: a low-resolution A/D converter that performs analog-digital conversion of a first phase difference signal, which represents a phase difference between a digitally modulated modulation signal and an oscillation signal, with a resolution lower than at least a resolution of a digital demodulation signal, which is a final output, to generate a second phase difference signal that is digital; a low-resolution D/A converter that performs digital-analog conversion of the second phase difference signal to generate a third phase difference signal that is analog; an analog subtractor that subtracts the third phase difference signal from the first phase difference signal to generate a first control signal; an ADPLL that generates a second control signal on the basis of a reference signal and the oscillation signal; and an FVO that generates the oscillation signal on the basis of the first control signal and the second control signal.

There is provided a demodulator that makes it possible to reduce or avoid deterioration in demodulation performance due to nonlinearity of input amplitude-frequency characteristics of a variable capacitive element included in an analog control signal input section of a frequency variable oscillator, while suppressing an influence of noise. The demodulator includes: a low-resolution A/D converter that performs analog-digital conversion of a first phase difference signal, which represents a phase difference between a digitally modulated modulation signal and an oscillation signal, with a resolution lower than at least a resolution of a digital demodulation signal, which is a final output, to generate a second phase difference signal that is digital; a low-resolution D/A converter that performs digital-analog conversion of the second phase difference signal to generate a third phase difference signal that is analog; an analog subtractor that subtracts the third phase difference signal from the first phase difference signal to generate a first control signal; an ADPLL that generates a second control signal on the basis of a reference signal and the oscillation signal; and an FVO that generates the oscillation signal on the basis of the first control signal and the second control signal.

Amplitude-modulated (AM) signals spanning a spatial wide area can be efficiently detected using a slowly scanning optical system. The system decouples the AM carrier from the AM signal bandwidth (or carrier uncertainty), enabling Nyquist sampling of only the information-bearing AM signal (or the known frequency bandwidth). The system includes a staring sensor with N pixels (e.g., N>10.sup.6) that searches for a sinusoidal frequency of unknown phase and frequency, perhaps constrained to a particular band by a priori information about the signal. Counters in the sensor pixels mix the detected signals with local oscillators to down-convert the signal of interest, e.g., to a baseband frequency. The counters store the down-converted signal for read out at a rate lower than the Nyquist rate of AM signal. The counts can be shifted among pixels synchronously with the optical line-of-sight for scanning operation.

According to one embodiment, a digital isolator includes a first metal portion, a first insulating portion, a second metal portion, a third metal portion, and a first layer. The first insulating portion is provided on the first metal portion. The second metal portion is provided on the first insulating portion. The third metal portion includes first, second, and third portions. The first portion is provided around the first metal portion in a direction perpendicular to a first direction. The second portion is provided on a portion of the first portion with a first conductive layer interposed. The third portion is provided on the second portion and provided around the second metal portion in the perpendicular direction. The first layer contacts the first conductive layer and an other portion of the first portion and is provided around a bottom portion of the second portion.

According to one embodiment, a digital isolator includes a first metal portion, a first insulating portion, a second metal portion, a third metal portion, and a first layer. The first insulating portion is provided on the first metal portion. The second metal portion is provided on the first insulating portion. The third metal portion includes first, second, and third portions. The first portion is provided around the first metal portion in a direction perpendicular to a first direction. The second portion is provided on a portion of the first portion with a first conductive layer interposed. The third portion is provided on the second portion and provided around the second metal portion in the perpendicular direction. The first layer contacts the first conductive layer and an other portion of the first portion and is provided around a bottom portion of the second portion.

A clock generation circuit has an injection-locked oscillator, a frequency doubler circuit, low pass filters and a calibration circuit. The injection-locked oscillator has an input coupled to a half-rate clock signal. The frequency doubler circuit has inputs coupled to outputs of the injection-locked oscillator. Each of the low pass filters has an input coupled to one of a plurality of outputs of the frequency doubler circuit. The calibration circuit includes comparison logic that receives outputs of the low pass filters. The calibration circuit has an output coupled to a control input of a source of a supply current in the injection-locked oscillator. In one example, the source of the supply current is a current digital to analog converter.

An electronic envelope detection circuit includes an input signal detecting circuit having at least one MOS transistor configured to receive a radiofrequency input signal and to deliver an internal signal on the basis of the input signal. The biasing point of the at least one transistor is controlled by the input signal and a control signal. A processing circuit that is coupled to the input signal detecting circuit is configured to deliver a low-frequency output signal on the basis of the internal signal and further deliver the control signal on the basis of the output signal. In operation, the value of the control signal decreases when the average power of the input signal increases, and vice versa.

An electronic envelope detection circuit includes an input signal detecting circuit having at least one MOS transistor configured to receive a radiofrequency input signal and to deliver an internal signal on the basis of the input signal. The biasing point of the at least one transistor is controlled by the input signal and a control signal. A processing circuit that is coupled to the input signal detecting circuit is configured to deliver a low-frequency output signal on the basis of the internal signal and further deliver the control signal on the basis of the output signal. In operation, the value of the control signal decreases when the average power of the input signal increases, and vice versa.