The embodiments described herein provide systems and methods for digital correction in low intermediate frequency (IF) receivers. Specifically, the embodiments described herein use digital correction techniques that can correct for signal distortions in low IF receivers caused by I-Q imbalance, including both I-Q magnitude imbalance and I-Q phase imbalance. In general, the embodiments described herein are implemented to at least partially cancel an image of a blocking signal in the complex digital signal. Such a cancellation can be implemented to at least partially cancel an image of blocking signal where that image occurs at or near the intermediate frequency. In one embodiment, a corrector is implemented in a low RF receiver and is configured to receive a complex digital signal that includes an image of a blocking signal. Such a low RF receiver can further include a corrector controller to selectively enable the corrector.

There is provided a demodulator that makes it possible to reduce or avoid deterioration in demodulation performance due to nonlinearity of input amplitude-frequency characteristics of a variable capacitive element included in an analog control signal input section of a frequency variable oscillator, while suppressing an influence of noise. The demodulator includes: a low-resolution A/D converter that performs analog-digital conversion of a first phase difference signal to generate a second phase difference signal that is digital; a low-resolution D/A converter that performs digital-analog conversion of the second phase difference signal to generate a third phase difference signal; an analog subtractor that subtracts the third phase difference signal from the first phase difference signal to generate a first control signal; an ADPLL that generates a second control signal; and an FVO that generates the oscillation signal on the basis of the first control signal and the second control signal.

There is provided a demodulator that makes it possible to reduce or avoid deterioration in demodulation performance due to nonlinearity of input amplitude-frequency characteristics of a variable capacitive element included in an analog control signal input section of a frequency variable oscillator, while suppressing an influence of noise. The demodulator includes: a low-resolution A/D converter that performs analog-digital conversion of a first phase difference signal to generate a second phase difference signal that is digital; a low-resolution D/A converter that performs digital-analog conversion of the second phase difference signal to generate a third phase difference signal; an analog subtractor that subtracts the third phase difference signal from the first phase difference signal to generate a first control signal; an ADPLL that generates a second control signal; and an FVO that generates the oscillation signal on the basis of the first control signal and the second control signal.

A method of detecting crosstalk for a digital isolator having first and second channels including two die with channels including a transmit side, receive side, with 1 die including a capacitive barrier for each channel. A first clock signal at a first frequency in a first pulse pattern and a second clock signal at a second frequency in a second pulse pattern are configured, wherein the pulse patterns have a phase difference. The transmit side of the channels each encode their received clock pulse pattern, then modulate with a carrier frequency to provide a fc1 and a fc2 signal, respectively. The receive side of the channels demodulate received signals during a rising or falling edge of their clock signal to generate a delayed received version of the first and second clock pulse pattern. Missing pulses are identified by comparing the delayed received clock pulse patterns to their clock pulse patterns.

A method of detecting crosstalk for a digital isolator having first and second channels including two die with channels including a transmit side, receive side, with 1 die including a capacitive barrier for each channel. A first clock signal at a first frequency in a first pulse pattern and a second clock signal at a second frequency in a second pulse pattern are configured, wherein the pulse patterns have a phase difference. The transmit side of the channels each encode their received clock pulse pattern, then modulate with a carrier frequency to provide a fc1 and a fc2 signal, respectively. The receive side of the channels demodulate received signals during a rising or falling edge of their clock signal to generate a delayed received version of the first and second clock pulse pattern. Missing pulses are identified by comparing the delayed received clock pulse patterns to their clock pulse patterns.

Systems, methods, and circuitries are disclosed for generating a desired signal from a received signal. In one example a signal cancellation system includes local oscillator (LO) downconverter circuitry, frequency offset (FO) signal estimation circuitry, and cancellation circuitry. The LO downconverter is configured to downconvert the received signal using an LO signal having an LO frequency to generate a downconverted received signal. The FO signal estimation circuitry includes FOLO generation circuitry configured to modify the LO signal to generate a FOLO signal having an offset frequency that is different from the LO frequency and FOLO downconverter circuitry configured to use the FOLO signal to downconvert a signal derived from the received signal to generate a downconverted FO signal. The cancellation circuitry is configured to cancel either the downconverted received signal or the downconverted FO signal from the received signal to generate the desired signal.

A mixer module includes a mixer, at least one DC offset circuit, a filter and a controller. The mixer mixes an input signal to generate a first signal. The at least one DC offset circuit generates a second signal based on the first signal. The filter filters out an AC portion of the second signal and generates a third signal according to a DC portion of the second signal. The controller controls the at least one DC offset circuit based on the third signal to reduce a DC portion of the first signal.

For example, an apparatus may include a Local Oscillator (LO) generator configured to generate a distributed modulated LO signal by modulating an LO signal based on a reset signal; and a plurality of Physical Layer (PHY) chains to receive the distributed modulated LO signal, which is distributed to the plurality of PHY chains by the LO generator, a PHY chain of the plurality of PHY chains including a reset detector configured to detect the reset signal based on the distributed modulated LO signal, and, based on a detection of the reset signal, to reset one or more Radio Frequency (RF) elements of the PHY chain.

A system and a method that enable two or more dispersed platforms to simultaneously use respective frequency-modulated continuous-wave radar systems in a typical radar application such as synthetic-aperture radar for terrain mapping, moving-target indicator radar to track targets on the ground and air-to-air tracking of other aircraft. The systems use the same RF spectrum in their operation and also communicate through their respective radar systems while simultaneously reducing their interplatform interference through the use of both filters and coded waveforms.

Methods and apparatus for performing a high speed phase demodulation scheme using a low bandwidth phase-lock loop are disclosed. An example apparatus includes a low bandwidth phase lock loop to lock to a data signal at a first phase, the data signal capable of oscillating at the first phase or a second phase; and output a first output signal at the first phase and a second output signal at the second phase, the first output signal or the second output signal being utilized in a feedback loop of the low bandwidth phase lock loop. The example apparatus further includes a fast phase change detection circuit coupled to the low bandwidth phase lock loop to determine whether the data signal is oscillating at the first phase or the second phase.