H03F3/00

Apparatuses and methods for hybrid switched capacitor array power amplifiers

Embodiments of the disclosure are drawn to apparatuses a hybrid switched capacitor array power amplifier (H-SCPA). The H-SCPA may have an array of storage elements divided into sub-arrays. A first sub-array may be configured to receive a delta sigma modulated (DSM) signal. A second sub-array may be configured to receive a Nyquist-rate signal. The H-SCPA may provide an output based on the received DSM and Nyquist-rate signals. The first sub-array and second sub-array may have different architectures. The DSM signal may represent the least significant bits of the signal and the Nyquist-rate signal may represent the most significant bits of the signal.

Optical sensor and method having high linearity digital controlling mechanism
11255726 · 2022-02-22 · ·

An optical sensor and a method having a high linearity digital controlling mechanism are provided. An optoelectronic component converts a light energy into a photocurrent. Then, the photocurrent flows to a current mirror and is amplified by a gain to form a charging current by the current mirror to charge a capacitor. A comparator compares a voltage of the capacitor with a reference voltage multiple times to generate a comparison signal. A counter determines a digital value capturing range according to the gain, and counts bit values that fall within the digital value capturing range from the comparison signal to output a counted signal. A noise cancellation processor reduces the digital value capturing range according to the gain, and removes one or more of the bit values that do not fall within the digital value capturing range from the counted signal to output a sensed signal.

PROGRAMMABLE AMPLIFIER CIRCUIT CAPABLE OF PROVIDING LARGE OR LARGER RESISTANCE FOR FEEDBACK PATH OF ITS AMPLIFIER
20170288617 · 2017-10-05 ·

A programmable amplifier circuit includes an amplifier, an input capacitor coupled to an input of the amplifier, a feedback capacitor coupled to the input of the amplifier and an output of the amplifier, and a switched-capacitor resistor circuit. The switched-capacitor resistor circuit is coupled between the input of the amplifier and the output of the amplifier, and configured for simulating a feedback resistor element to provide a resistance for a feedback path of the amplifier by using at least one capacitor placed between the input of the amplifier and the output of the amplifier to avoid leakage current(s) flowing back to an input of the amplifier.

LOW-NOISE SWITCHED-CAPACITOR CIRCUIT
20220052704 · 2022-02-17 · ·

Herein disclosed are multiple embodiments of a signal-processing circuit that may be utilized in various circuits, including conversion circuitry. The signal-processing circuit may receive an input and produce charges on multiple different capacitors during different phases of operation based on the input. The charges stored on two or more of the multiple different capacitors may be utilized for producing an output of the signal-processing circuit, such as by combing the charges stored on two or more of the multiple different capacitors. Utilizing the charges on the multiple different capacitors may provide for a high level of accuracy and robustness to variations of environmental factors, and/or a low noise level and power consumption when producing the output.

Calibrating circuit and calibrating method for display panel
09754534 · 2017-09-05 · ·

A circuit and a calibrating method are provided. A pixel sensor senses a terminal voltage of a driving transistor during a sensing period. A calibration sensor senses a first predetermined voltage and a second predetermined voltage during a calibration period. An amplifying circuit amplifies the terminal voltage according to a gain, and amplifies the first predetermined voltage and the second predetermined voltage according to the gain. An analog to digital converter converts the amplified terminal voltage into a digital code, and converts the amplified first predetermined voltage into a first digital code and converts the amplified second predetermined voltage into a second digital code. A gain adjusting circuit adjusts the gain according to the first digital code and the second digital code. Accordingly, the gain of the amplifying circuit is calibrated.

Controlling a Power Amplification Stage of an Audio Signal Amplifier
20170250665 · 2017-08-31 ·

An audio reproduction apparatus is shown and includes an amplifier with a power amplification stage having transistors in a push-pull arrangement. A bias generator biases the transistors with a standing current. A processor receives a data stream comprising digital samples of an analog audio signal and analyzes the peak level of each group. It then determines the appropriate standing currents to maintain Class A operation of the power amplification stage given the peak levels of each of the groups. A digital to analog converter produces an analog input signal for the input stage of the amplifier from the data stream. A feedforward path between the processor and the bias generator allows the standing current to be adjusted prior to the arrival of the analog input signal in the power amplification stage.

CLAMPING AUDIO SIGNAL PATHS

This application describes methods and apparatus for selectively clamping a signal path (106) for an analogue audio signal to a clamp voltage, e.g. ground. Voltage clamping circuitry (200) is disclosed having a first switching device (201) in series with a second switching device (202) between a node of the signal path and the clamp voltage. The clamping circuitry is configured to be operable in: a first state where the first and second switching devices are both on to electrically connect the signal path to the clamp voltage; and also a second state to electrically disconnect the signal path from the clamp voltage. In the second state one of the first and second switching devices is configured to block conduction when the voltage at said node of the signal path is positive and the other switching device is configured to block conduction when the voltage at said node of the signal path is negative.

SWITCHED-CAPACITOR INPUT CIRCUIT, SWITCHED-CAPACITOR AMPLIFIER, AND SWITCHED-CAPACITOR VOLTAGE COMPARATOR
20170250661 · 2017-08-31 ·

In order to realize a circuit in a subsequent stage with a smaller circuit scale with respect to a single-ended input of a large signal, a double-sampling switched-capacitor input circuit includes a first switched-capacitor input circuit, which includes first capacitors for double sampling, and a second switched-capacitor input circuit, which includes second capacitors for double sampling, and which is configured to operate in opposite phase to the first switched-capacitor input circuit, the double-sampling switched-capacitor input circuit having a configuration in which the first capacitors and the second capacitors have different values, and in which the value of the second capacitors is adjusted so that a signal is attenuated.

SLEWING MITIGATION APPARATUS FOR SWITCHED CAPACITOR CIRCUIT

A slewing mitigation technique is presented where just the right amount of charge is provided at the switching instant to a switch capacitor circuit so that operational transconductance amplifier (OTA) does not need to provide high peak current. This eliminates slewing altogether and allows using OTAs with less static current for the same settling accuracy.

Apparatus and method for processing signal

An apparatus of processing a signal or a biosignal, and a method of processing a signal or a biosignal are provided. The method of processing signal involves receiving a first reference signal having a frequency component of a measurement signal to be applied to a subject, receiving a second reference signal having a frequency component within a frequency bandwidth of an amplifier, and converting a first signal measured from the subject to a second signal within the frequency bandwidth of the amplifier, based on the first reference signal and the second reference signal.