To improve stability of a reference current in a current source circuit that generates the reference current by using capacitors. The current source circuit includes a pair of capacitors, a switching circuit, an operational amplifier, and an output transistor. The switching circuit charges one of the pair of capacitors with a predetermined charging current, and transfers electric charge from the one of the pair of capacitors to the other of the pair of capacitors. The operational amplifier amplifies a difference between the terminal voltage of the other of the pair of capacitors and a predetermined reference voltage and outputs the difference that has been amplified as an output voltage. The output transistor outputs a current corresponding to the output voltage as a reference current.

The present disclosure discloses a switched capacitor amplifier apparatus for improving level-shifting. An amplifier includes input terminals and output terminals. Two capacitor circuits correspond to signal input terminals and signal output terminals and each includes a sampling capacitor circuit, a load capacitor and a level-shifting capacitor. The sampling capacitor circuit samples an input signal from one of the signal input terminals to one of the input terminals. An electrical charge neutralizing capacitor is coupled between the output terminals. The load capacitor and the level-shifting capacitor are charged according to an output from one of the output terminals in an estimation period. The level-shifting capacitor charges the load capacitor in a level-shifting period to generate an output signal at one of the signal output terminals. The electrical charge neutralizing capacitor receives and provides electrical charges from the output terminals to the level-shifting capacitor respectively in the estimation period and the level-shifting period.

A signal detection circuit includes: a first capacitor having a first terminal connected with a first main terminal of a switching element; a second capacitor having a first terminal connected with a second main terminal of the switching element; and a detection circuit having a differential circuit configuration. The detection circuit receives, as input signals, a signal from a second terminal of the first capacitor and a signal from a second terminal of the second capacitor, detects detection target signals based on the input signals. The detection target signals include a signal of the first main terminal of the switching element and a signal of the second main terminal of the switching element.

An amplifier arrangement comprises a sensor input and a first and a second amplifier. The first amplifier has a first amplifier output and a first input connected to a first reference potential terminal and a second input connected to the sensor input in a direct fashion and to the first amplifier output via a feedback path having a switched integration capacitor that is charged by the feedback path during a first switching phase and discharged during a second switching phase. The second amplifier has a second amplifier output, a first input connected to a second reference potential terminal and a second input. A first feedback capacitor is connected in-between two pairs of feedback switches. A second feedback capacitor is connected between the second amplifier output and the second input of the second amplifier. An impedance element is coupled between the second amplifier output and the sensor input.

A chopper switch is connected appropriately to multistage amplifiers.

A semiconductor circuit includes a plurality of amplifiers that is connected in series and individually amplify and supply a signal on an input side thereof to an output side thereof. A first chopper switch is connected to an input side of a first amplifier connected first among the plurality of amplifies, and a second chopper switch is connected to an output side of the first amplifier. The first and second chopper switches act in synchronism with a first chopper clock. A third chopper switch is connected to an input side of a second amplifier connected second or later among the plurality of amplifiers, and a fourth chopper switch is connected to an output side of the second amplifier. The third and fourth chopper switches act in synchronism with a second chopper clock. A phase compensation capacitor is connected at one end thereof to an input portion of the third chopper switch.

According to an embodiment, there is provided an amplifier circuit including a first capacitive element, a first GM amplifier, and a second GM amplifier. The first GM amplifier includes a first input node, a second input node, and an output node. The output node is connected to one end of the first capacitive element. The second GM amplifier includes a first input node, a second input node, and an output node. The output node is connected to one end of the first capacitive element and the second input node.

A logarithmic amplifier includes programmable gain amplifiers each having a different gain, wherein an input of each of the programmable gain amplifiers is coupled to an input of the logarithmic amplifier; and a summing circuit having inputs coupled to a corresponding output of each of the programmable gain amplifiers and an output coupled to an output of the logarithmic amplifier, wherein the summing circuit generates a logarithmic transfer function having piecewise linear segments.

An amplifier circuit includes a low noise amplifier disposed in an amplification path, switches connected in series to a bypass path bypassing the low noise amplifier, a capacitor having at least one end connected between the switches in the bypass path, and a switch connected between the bypass path and a ground. The switch connected between the bypass path and the ground is connected between the other switches.

Herein disclosed are multiple embodiments of a signal-processing circuit that may be utilized in various circuits, including conversion circuitry. The signal-processing circuit may receive an input and produce charges on multiple different capacitors during different phases of operation based on the input. The charges stored on two or more of the multiple different capacitors may be utilized for producing an output of the signal-processing circuit, such as by combing the charges stored on two or more of the multiple different capacitors. Utilizing the charges on the multiple different capacitors may provide for a high level of accuracy and robustness to variations of environmental factors, and/or a low noise level and power consumption when producing the output.

A wideband amplifier includes an input matching network for matching a transconductor stage to an input impedance and includes an output matching network for matching the transconductor stage to an output impedance. Both the input and output matching networks each includes a parallel LC tank circuit arranged in parallel with a series LC tank circuit. The tank circuit arrangements configure the input and output matching networks to be resonant at a first frequency, a midrange frequency that is greater than the first frequency, and a second frequency that is greater than the midrange frequency to provide wideband matching.