The present disclosure provides a voltage comparator circuit, a power management circuit and an electronic device. The voltage comparator circuit compares a voltage difference between a positive electrode input terminal and a negative electrode input terminal with a threshold voltage. An amplifier circuit includes a first input node and a second input node, and amplifies a voltage difference between the first input node and the second input node. The input switch circuit, in a first phase, applies a predetermined voltage of one of the positive electrode input terminal and the negative electrode input terminal to the first input node and the second input node of the amplifier circuit; and in a second phase, applies a voltage of the positive electrode input terminal to the first input node of the amplifier circuit, and applies a voltage of the negative electrode input terminal to the second input node.

A switched capacitor modulator (SCM) includes a RF power amplifier. The RF power amplifier receives a rectified voltage and a RF drive signal and modulates an input signal in accordance with the rectified voltage to generate a RF output signal to an output terminal. A reactance in parallel with the output terminal is configured to vary in response to a control signal to vary an equivalent reactance in parallel with the output terminal. A controller generates the control signal and a commanded phase. The commanded phase controls the RF drive signal. The reactance is at least one of a capacitance or an inductance, and the capacitance or the inductance varies in accordance with the control signal.

A semiconductor device including an amplifier with improved accuracy is provided. The semiconductor device includes a switch, a capacitor, a chopping circuit, and the amplifier. The amplifier includes a non-inverting input terminal, an inverting input terminal, an inverting output terminal, and a non-inverting output terminal. The semiconductor device, with use of the switch and the capacitor, has a function of sampling and holding a first potential and a second potential input in a first period. The chopping circuit is provided on each of the input terminal side and the output terminal side of the amplifier, and the first potential and the second potential are each input to either one of the non-inverting input terminal and the inverting input terminal in a second period. In a third period, the first potential and the second potential are each input to either one of the non-inverting input terminal and the inverted input terminal, which is different from the second period. In a similar manner, the inverting output terminal and non-inverting output terminal are replaced by the chopping circuit in the second period and the third period to be output from the semiconductor device.

A reference voltage generating circuit includes a bandgap reference (BGR) circuit configured to output an active reference voltage at a first node according to a sample signal; a first charging circuit configured to charge a first capacitor using the active reference voltage according to the sample signal; a second charging circuit configured to charge a second capacitor using the active reference voltage according to the sample signal; and a comparing circuit configured to compare a voltage difference between a charge voltage of the first capacitor and a charge voltage of the second capacitor with a threshold value, wherein the sample signal is a pulse signal generated using an output of the comparing circuit and the charge voltage of the first capacitor is provided as a low power reference voltage in a low power operation mode.

Herein disclosed are multiple embodiments of a signal-processing circuit that may be utilized in various circuits, including conversion circuitry. The signal-processing circuit may receive an input and produce charges on multiple different capacitors during different phases of operation based on the input. The charges stored on two or more of the multiple different capacitors may be utilized for producing an output of the signal-processing circuit, such as by combing the charges stored on two or more of the multiple different capacitors. Utilizing the charges on the multiple different capacitors may provide for a high level of accuracy and robustness to variations of environmental factors, and/or a low noise level and power consumption when producing the output.

A dynamic comparator includes a differential amplifier stage, a switching unit and a switching charge storage unit. The switching charge storage unit includes a plurality of switching transistors, and a charge storage capacitor electrically connected to the plurality of switching transistors. When an operational mode of the dynamic comparator is switched from a comparison state to a reset state, a voltage on one of a first terminal and a second terminal of the charge storage capacitor is increased from a half of the system voltage to a system voltage, so as to implement a charge recycle effect. The dynamic comparator of the present invention can have lower power consumption and lower charge-discharge current.

An amplifier for converting a differential input signal to a single ended output signal. In particular, the amplifier including a converting circuit for converting a differential input signal into a single ended output signal, the converting circuit including an input section for receiving the differential input signal and an output section including an output port for providing the single ended output signal, where the output section includes a capacitive element configured to reduce an intrinsic time constant of the converting circuit.

In accordance with the embodiments of the present disclosure, a rack comprising a frame having first vertical posts on a first side and second vertical posts on a second side, between which a plurality of RF amplifier modules are mounted, is provided. The RF power outputs of the RF amplifier modules are connected to inputs of an RF power combiner to deliver a combined RF power output. The RF power combiner is arranged at least partially in at least one of a first volume between the first vertical posts of the frame or a second volume between the second vertical posts of the frame, thereby reducing a footprint of the rack.

System and apparatus for measuring biopotential and implementation thereof. A device for mitigating electromagnetic interference (EMI) thereby increasing signal-to-noise ratio is disclosed. Specifically, the present disclosure relates to an elegant, novel circuit for measuring a plurality of biopotentials in useful in a variety of medical applications. This allows for robust, portable, low-power, higher S/N devices which have historically required a much bigger footprint.

A switched capacitor digital power amplifier (DPA) or a digital-to-analog converter (DAC) is disclosed. The DPA/DAC includes a plurality of switched capacitor cells connected in parallel. Each switched capacitor cell includes a capacitor and a switch. The switch selectively drives the capacitor in response to an input digital codeword. The switched capacitor cells are divided into sub-arrays and a series capacitor is inserted in series between two adjacent sub-arrays of switched capacitor cells. All the sub-arrays of switched capacitor cells may be in a unary-coded structure. Alternatively, at least one of the sub-arrays may be in a C-2C structure and at least one another sub-array may be in a unary-coded structure. The switch in the switched capacitor cells is driven by a local oscillator signal, and a phase correction buffer may be added for adjusting a delay of the local oscillator signal supplied to sub-arrays of switched capacitor cells.