A signal detection circuit includes: a first capacitor having a first terminal connected with a first main terminal of a switching element; a second capacitor having a first terminal connected with a second main terminal of the switching element; and a detection circuit having a differential circuit configuration. The detection circuit receives, as input signals, a signal from a second terminal of the first capacitor and a signal from a second terminal of the second capacitor, detects detection target signals based on the input signals. The detection target signals include a signal of the first main terminal of the switching element and a signal of the second main terminal of the switching element.

Embodiments relate to a circuit implementation for extending the bandwidth of an amplifier. The extended bandwidth amplifier includes an amplifier coupled between an input node and an output node of the extended bandwidth amplifier. The amplifier has an input capacitance and an output capacitance. The extended bandwidth amplifier additionally includes a first digitally-trimmable negative-capacitance capacitor coupled between the input node of the extended bandwidth amplifier and a power supply terminal. The digitally-trimmable negative-capacitance capacitor includes a first branch, a second branch, and a controller. The first branch includes a first capacitor having a first negative capacitance, and a first switch. The second branch includes a second capacitor having a second negative capacitance, and a second switch. The controller is configured to turn on the first switch and the second switch based on the input capacitance of the amplifier.

A microphone includes a MEMS device having an output node for generating an analog voltage in response to an input sound wave or vibration; a source follower having a control node coupled to the output node of the MEMS device, a current path coupled between a first controlled node and a second controlled node, and a bulk node, wherein the first controlled node is configured for providing a microphone output voltage, and wherein the second controlled node is coupled to a reference voltage; a current source coupled to the first controlled node; and a voltage differential between the first controlled node and the bulk node, wherein a nonzero value of the voltage differential is configured such that a first 1% total harmonic distortion (THD) cross-point of the microphone output voltage is greater than a second 1% THD cross-point of the microphone output voltage using a zero value voltage differential.

An ultra-low power sub-threshold g.sub.m stage is disclosed where transconductance is very stable with process, temperature, and voltage variations. This technique can be implemented in a differential amplifier with constant gain and a second order biquad filter with constant cut off frequency. The amplifier gain can achieve a small temperature coefficient of 48.6 ppm/° C. and exhibits small sigma of 75 mdB with process. The second order biquad can achieve temperature stability of 69 ppm/° C. and a voltage coefficient of only 49 ppm/mV.

A push-pull dynamic amplifier is operable in reset and amplification phases. The amplifier includes first NMOS and PMOS input transistors that are electrically coupled to a first input terminal and a first output terminal. Second NMOS and PMOS input transistors are electrically coupled to a second input terminal and a second output terminal. First and second reset switches are electrically coupled to the first and second output terminals, respectively. A power supply switch is electrically coupled to the first and the second PMOS transistors, and a ground switch is electrically coupled to the first and the second NMOS transistors. During the reset phase, the reset switches are closed and the power supply switch and the ground switch are opened. During the amplification phase, the reset switches are opened and the power supply switch and the ground switch are closed.

A power amplifier module can include one or more switches, a coupler module, input signal pins, and a controller having first and second output terminals. The input signal pins can receive a voltage input/output signal, a clock input signal, and a data input signal. The controller can (i) set a mode of the one or more switches using a synchronous communication protocol in which the controller outputs a synchronous clock signal on the first output terminal and a data signal on the second output terminal, when the power amplifier module is in a first operating mode, or (ii) set a mode of the coupler module using an asynchronous communication protocol in which the controller outputs a first asynchronous control signal on the first output terminal and a second asynchronous control signal on the second output terminal, when the power amplifier module is in a second operating mode.

A power amplifier module can include one or more switches, a coupler module, input signal pins, and a controller having first and second output terminals. The input signal pins can receive a voltage input/output signal, a clock input signal, and a data input signal. The controller can (i) set a mode of the one or more switches using a synchronous communication protocol in which the controller outputs a synchronous clock signal on the first output terminal and a data signal on the second output terminal, when the power amplifier module is in a first operating mode, or (ii) set a mode of the coupler module using an asynchronous communication protocol in which the controller outputs a first asynchronous control signal on the first output terminal and a second asynchronous control signal on the second output terminal, when the power amplifier module is in a second operating mode.

A switched-capacitor amplifier circuit includes multiple switched-capacitor networks, an amplifier, and multiple reset circuits. The switched-capacitor networks are configured to receive respective input voltages during a sampling phase, and generate sampled voltages. During an amplification phase, the amplifier is coupled with the switched-capacitor networks, and is configured to receive the sampled voltages. The amplifier is further configured to generate output voltages. During the sampling phase, the amplifier is coupled with the reset circuits, and is further configured to receive divided voltages such that the amplifier is reset. The reset circuits are configured to receive and provide a common-mode voltage and the output voltages to the amplifier. The divided voltages are generated based on the common-mode voltage and the output voltages. Each reset circuit includes at least one of a resistor and a capacitor.

A device having a capacitive sampling structure that allows for removal of sampling noise can be implemented in a variety of applications. Noise cancellation can be achieved by storing on an auto-zero capacitor a scaled replica of kT/C noise by a mechanism of correlated sampling. In an example embodiment, a set of switches can be arranged such that, in switching, scaled thermal noise, generated in an acquisition phase in which a voltage signal is input to an input capacitor structure, is captured on an output capacitor structure and, in a conversion phase, the captured thermal noise is cancelled or compensated from an output of the output capacitor structure.

A microphone includes a MEMS device having an output node for generating an analog voltage in response to an input sound wave or vibration; a source follower having a control node coupled to the output node of the MEMS device, a current path coupled between a first controlled node and a second controlled node, and a bulk node, wherein the first controlled node is configured for providing a microphone output voltage, and wherein the second controlled node is coupled to a reference voltage; a current source coupled to the first controlled node; and a voltage differential between the first controlled node and the bulk node, wherein a nonzero value of the voltage differential is configured such that a first 1% total harmonic distortion (THD) cross-point of the microphone output voltage is greater than a second 1% THD cross-point of the microphone output voltage using a zero value voltage differential.