Techniques relate to an on-chip Josephson parametric converter. A Josephson ring modulator includes four nodes. A lossless on-chip flux line is capacitively coupled to two adjacent nodes of the four nodes of the Josephson ring modulator. The lossless on-chip flux line has an input port configured to receive a pump drive signal that couples differentially to the two adjacent nodes of the of the Josephson ring modulator. The pump drive signal thereby excites a common mode of the on-chip Josephson parametric converter.

An impedance matching circuit be connected to a non-linear impedance including a superconductor, includes a first terminal designated first connection port to be connected to a first connector of the non-linear impedance, a second terminal designated second connection port to be connected to a second connector of the non-linear impedance, a third terminal designated input/output terminal to receive the signal to amplify and a fourth terminal designated supply terminal to be connected to a polarisation source and configured so that a voltage V is applied between the first connection port and the second connection port. The circuit further includes a plurality of passive electrical components.

A chip preparation method and system, and a chip are provided. The method includes: preparing, by using a laser direct writing exposure manner, a first underlying circuit of an impedance Josephson parametric amplifier and a second underlying circuit for testing, to obtain a first chip product; generating, on the first chip product by using the laser direct writing exposure manner, a photoresist structure for preparing a Josephson junction; cutting, from the first chip product, a second chip product on which the second underlying circuit is located and a third chip product on which the first underlying circuit is located; preparing a Josephson junction sample based on a photoresist structure corresponding to the second underlying circuit, to obtain an oxidation condition; and preparing, according to the oxidation condition, the Josephson junction based on a photoresist structure corresponding to the first underlying circuit.

A chip preparation method and system, and a chip are provided. The method includes: preparing, by using a laser direct writing exposure manner, a first underlying circuit of an impedance Josephson parametric amplifier and a second underlying circuit for testing, to obtain a first chip product; generating, on the first chip product by using the laser direct writing exposure manner, a photoresist structure for preparing a Josephson junction; cutting, from the first chip product, a second chip product on which the second underlying circuit is located and a third chip product on which the first underlying circuit is located; preparing a Josephson junction sample based on a photoresist structure corresponding to the second underlying circuit, to obtain an oxidation condition; and preparing, according to the oxidation condition, the Josephson junction based on a photoresist structure corresponding to the first underlying circuit.

According to an example aspect of the present invention, there is provided an isolating amplifier apparatus comprising a first 2?2 hybrid coupler and a second 2?2 hybrid coupler, each 2?2 hybrid coupler having a first input port, a second input port, a first output port and a second output port, a first travelling wave parametric amplifier, TWPA, comprising an input connected to the first output port of the first 2?2 hybrid coupler and an output connected to the first input port of the second 2?2 hybrid coupler, and a second travelling wave parametric amplifier, TWPA, comprising an input connected to the second output port of the first 2?2 hybrid coupler and an output connected to the second input of the second 2?2 hybrid coupler.

According to an example aspect of the present invention, there is provided an isolating amplifier apparatus comprising a first 2?2 hybrid coupler and a second 2?2 hybrid coupler, each 2?2 hybrid coupler having a first input port, a second input port, a first output port and a second output port, a first travelling wave parametric amplifier, TWPA, comprising an input connected to the first output port of the first 2?2 hybrid coupler and an output connected to the first input port of the second 2?2 hybrid coupler, and a second travelling wave parametric amplifier, TWPA, comprising an input connected to the second output port of the first 2?2 hybrid coupler and an output connected to the second input of the second 2?2 hybrid coupler.

A traveling wave kinetic inductance parametric amplifier is presented. The amplifier includes a microstrip structure defining a parallel plate capacitor element formed by first and second electrically conductive layers spaced by a dielectric spacer layer. The first electrically conductive layer is made of superconducting material composition having desirably high kinetic inductance and being configured as a nanoscale thickness strip.

A traveling wave kinetic inductance parametric amplifier is presented. The amplifier includes a microstrip structure defining a parallel plate capacitor element formed by first and second electrically conductive layers spaced by a dielectric spacer layer. The first electrically conductive layer is made of superconducting material composition having desirably high kinetic inductance and being configured as a nanoscale thickness strip.

A variable temperature load (VTL) or noise source including a grounded coplanar waveguide (GCPW) comprising a first metallization patterned on a fused quartz substrate, the first metallization comprising a first end for connecting to a coaxial connector and a second end for connecting to a coplanar waveguide (CPW); the CPW coupled to a 50 ohm termination and comprising a second metallization patterned on a top surface of a crystal quartz substrate; a temperature sensing diode thermally coupled to the crystal quartz substrate and the second metallization; and a heater resistor coupled to the crystal quartz substrate via contact metallization.

A variable temperature load (VTL) or noise source including a grounded coplanar waveguide (GCPW) comprising a first metallization patterned on a fused quartz substrate, the first metallization comprising a first end for connecting to a coaxial connector and a second end for connecting to a coplanar waveguide (CPW); the CPW coupled to a 50 ohm termination and comprising a second metallization patterned on a top surface of a crystal quartz substrate; a temperature sensing diode thermally coupled to the crystal quartz substrate and the second metallization; and a heater resistor coupled to the crystal quartz substrate via contact metallization.