Provided is an amplification circuit that amplifies an input signal and outputs an amplified signal. The amplification circuit includes: an amplification element that outputs the amplified signal from an output terminal thereof; an inductor having one end to which a power supply voltage is supplied and another end that is connected to the output terminal of the amplification element; a variable resistor that is connected in parallel with the inductor; and a resistance value adjusting circuit that adjusts a resistance value of the variable resistor in accordance with the temperature.

An integrated circuit amplifier configurable to be either a programmable gain amplifier or an operational amplifier comprises two output blocks, one output block is optimized for programmable gain amplifier operation, and the other output block is optimized for operational amplifier applications. A common single input stage, input offset calibration and bias generation circuits are used with either amplifier configuration. Thus duplication of the input stage, offset calibration and bias generation circuits are eliminated while still selectably providing for either a programmable gain amplifier or operational amplifier configuration.

Embodiments of circuits for use with an amplifier that includes multiple amplifier paths include a first circuit and a second circuit in parallel with the first circuit. The first circuit includes a first input coupled to a first power divider output, a first output coupled to a first amplifier path of the multiple amplifier paths, and a first adjustable phase shifter and a first attenuator series coupled between the first input and the first output. The second circuit includes a second input coupled to a second power divider output, a second output coupled to a second amplifier path of the multiple amplifier paths, and a second adjustable phase shifter coupled between the second input and the second output.

A bidirectional amplifier includes first and second ports, with a first summing node connected to the first port and a second summing node connected to the second port. First and second gain stages are connected between the first and second summing nodes, respectively, and a first node. First and second feedback stages are also connected between the first and second summing nodes, respectively, and the first node. The amplifier operates in a first mode in which an amplified version of a signal applied to the first port is provided at the second port, or a second mode in which an amplified version of a signal applied to the second port is provided at the first port. The first and second gain stages are preferably first and second common emitter cascode arrangements, and the first and second feedback stages are preferably first and second emitter followers.

A method and apparatus for transmitting a communication signal through a dual-mode power amplifier may include amplifying a communication signal by a first amplifier and/or a second amplifier of the dual-mode power amplifier based on a desired transmit output power. The output of the first amplifier may be selectively coupled through a configurable inductive coupler to an antenna.

The present disclosure describes a method and system for linearizing an amplifier using transistor-level dynamic feedback. The method and system enables nonlinear amplifiers to exhibit linear performance using one or more of gain control elements and phase shifters in the feedback path. The disclosed method and system may also allow an amplifier to act as a pre-distorter or a frequency/gain programmable amplifier.

A method for operating a phase shifter chip RF self-test. The method includes outputting, by control hardware, a first signal from a phased locked loop to a pre-amplifier and an input peak detector, outputting, by the control hardware, a second signal from the pre-amplifier to a device under test, selecting, by the control hardware, a target level, and adjusting, by the control hardware, a pre-amplifier gain of the pre-amplifier to cause the input peak detector value to approximately match the target level. The input peak detector is configured to output an input peak detector value based on the first signal.

In some embodiments, a method for processing an audio signal in an audio processing apparatus is disclosed. The method includes receiving an audio signal and a parameter, the parameter indicating a location of an auditory event boundary. An audio portion between consecutive auditory event boundaries constitutes an auditory event. The method further includes applying a modification to the audio signal based in part on an occurrence of the auditory event. The parameter may be generated by monitoring a characteristic of the audio signal and identifying a change in the characteristic.

In some embodiments, a method for processing an audio signal in an audio processing apparatus is disclosed. The method includes receiving an audio signal and a parameter, the parameter indicating a location of an auditory event boundary. An audio portion between consecutive auditory event boundaries constitutes an auditory event. The method further includes applying a modification to the audio signal based in part on an occurrence of the auditory event. The parameter may be generated by monitoring a characteristic of the audio signal and identifying a change in the characteristic.

A phased array antenna system includes an array of antennas having first antenna and second antennas disposed equidistantly from a third antenna. The first antenna is associated with a first gain and a first phase and the second antenna is associated with a second gain and a second phase. The first antenna receives a first reference signal corresponding to a calibration reference signal transmitted by the third antenna, and the second antenna receives a second reference signal corresponding to the calibration reference signal transmitted by the third antenna. The second receiver module is configured to adjust the second gain and the second phase associated with the second antenna to match the first gain and the first phase associated with the first antenna by comparing the first reference signal received by the first antenna with the second reference signal received by the second antenna.